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[docs/isa.md](docs/isa.md) | Full ISA — number system, word size, registers, instruction format, opcode table, examples |\n| [docs/cpu_design.md](docs/cpu_design.md) | CPU execution model — fetch/decode/execute stages, pipeline, halt behaviour |\n\n## Architecture\n\n| Property          | Value                               |\n|-------------------|-------------------------------------|\n| Number system     | Balanced ternary (trits: −1, 0, +1) |\n| Word size         | 9 trits (values −9841 … +9841)      |\n| Instruction width | 18 trits (2 memory words)           |\n| Registers         | R0–R8 (GP) + PC + FLAGS             |\n| Memory            | 729 cells (3⁶), addresses −364…+364 |\n| Architecture      | RISC-style, fixed instruction width |\n\n→ Full execution model: [docs/cpu_design.md](docs/cpu_design.md)\n\n## Directory Structure\n\n```\nternary_cpu/\n│\n├── docs/\n│   ├── isa.md           ISA specification\n│   └── cpu_design.md    CPU execution model\n│\n├── cpu/\n│   ├── __init__.py\n│   ├── trits.py         Trit primitives, gates, Word type\n│   ├── ternary.py       Balanced-ternary arithmetic\n│   ├── alu.py           ALU operations and flags\n│   ├── registers.py     Register file (R0–R8, PC, FLAGS)\n│   ├── memory.py        729-cell memory\n│   └── cpu.py           Fetch/decode/execute CPU, instruction encoding\n│\n├── examples/\n│   └── countdown.py     Demo: count down from 5 to 0\n│\n├── main.py              Unit tests and integration demo\n├── README.md\n└── requirements.txt\n```\n\n## Instruction Set\n\nThis CPU implements 15 opcodes. For the full opcode table, instruction\nformat, register encoding, and usage examples see\n[docs/isa.md](docs/isa.md).\n\n**Quick reference:**\n\n| Group | Mnemonics |\n|-------|-----------|\n| Data movement | `MOV`, `LOAD`, `STORE` |\n| Arithmetic | `ADD`, `SUB`, `NEG`, `MUL` |\n| Tritwise logic | `TAND`, `TOR`, `TMUL` |\n| Control flow | `JMP`, `JZ`, `JNZ`, `HALT`, `NOP` |\n\n→ Full opcode table and encoding: [docs/isa.md](docs/isa.md)\n\n## Quick Start\n\n```python\nfrom cpu.cpu    import CPU, encode_instruction, Opcode\nfrom cpu.memory import ADDR_MIN\n\ncpu = CPU()\n\n# Build: MOV R1, 42 / HALT\nprogram = []\nh, l = encode_instruction(Opcode.MOV, ra=\"R1\", imm=42)\nprogram += [h, l]\nh, l = encode_instruction(Opcode.HALT)\nprogram += [h, l]\n\ncpu.load_program(program, start_addr=ADDR_MIN)\ncpu.run()\ncpu.state()\nprint(cpu.registers.read(\"R1\").to_int())  # → 42\n```\n\nRun the countdown demo:\n\n```bash\npython examples/countdown.py\n```\n\nRun all tests:\n\n```bash\npython main.py\n```\n\n## Requirements\n\nPython 3.10+, no external dependencies.\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fmahatolalit%2Fternary_cpu","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fmahatolalit%2Fternary_cpu","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fmahatolalit%2Fternary_cpu/lists"}