{"id":20126028,"url":"https://github.com/mahdisafsafi/parsable-instructions","last_synced_at":"2026-03-06T11:31:28.917Z","repository":{"id":88301495,"uuid":"41739201","full_name":"MahdiSafsafi/Parsable-Instructions","owner":"MahdiSafsafi","description":"A parsable list of x86 instructions.","archived":false,"fork":false,"pushed_at":"2017-03-02T09:58:36.000Z","size":171,"stargazers_count":25,"open_issues_count":0,"forks_count":3,"subscribers_count":4,"default_branch":"master","last_synced_at":"2025-03-09T21:53:34.726Z","etag":null,"topics":["instructions","opcodes","x86-64","xml"],"latest_commit_sha":null,"homepage":"","language":null,"has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"mit","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/MahdiSafsafi.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":"LICENSE","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null}},"created_at":"2015-09-01T13:08:45.000Z","updated_at":"2024-07-23T21:44:06.000Z","dependencies_parsed_at":null,"dependency_job_id":"7d5d93e5-0764-47c1-9937-c10d6b859f7c","html_url":"https://github.com/MahdiSafsafi/Parsable-Instructions","commit_stats":null,"previous_names":[],"tags_count":0,"template":false,"template_full_name":null,"purl":"pkg:github/MahdiSafsafi/Parsable-Instructions","repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/MahdiSafsafi%2FParsable-Instructions","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/MahdiSafsafi%2FParsable-Instructions/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/MahdiSafsafi%2FParsable-Instructions/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/MahdiSafsafi%2FParsable-Instructions/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/MahdiSafsafi","download_url":"https://codeload.github.com/MahdiSafsafi/Parsable-Instructions/tar.gz/refs/heads/master","sbom_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/MahdiSafsafi%2FParsable-Instructions/sbom","scorecard":null,"host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":286080680,"owners_count":30173694,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2026-03-06T07:56:45.623Z","status":"ssl_error","status_checked_at":"2026-03-06T07:55:55.621Z","response_time":250,"last_error":"SSL_connect returned=1 errno=0 peeraddr=140.82.121.6:443 state=error: unexpected eof while reading","robots_txt_status":"success","robots_txt_updated_at":"2025-07-24T06:49:26.215Z","robots_txt_url":"https://github.com/robots.txt","online":false,"can_crawl_api":true,"host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["instructions","opcodes","x86-64","xml"],"created_at":"2024-11-13T20:12:42.386Z","updated_at":"2026-03-06T11:31:28.879Z","avatar_url":"https://github.com/MahdiSafsafi.png","language":null,"funding_links":[],"categories":[],"sub_categories":[],"readme":"# IMPORTANT:\nThe project is dead ! No longer supported. \n\nConsider using [opcodesDB](https://github.com/MahdiSafsafi/opcodesDB).\n\n# Parsable-Instructions\nList of all instructions found in *Intel* and *AMD* documentations, listed into ***XML files*** for easy parsing.\nEach instruction in the XML file contains:\n\n* Instruction mnemonic.\n* Instruction arguments.\n* Instruction opcode.\n* Instruction opcode encoding.\n* Instruction 64 bit mode support.\n* Instruction 32 bit mode support.\n* Instruction CPUID flags.\n* Instruction operands encoding.\n* Instruction description.\n\n***NOTE***: Some fields listed above may not exists in other instructions.\n\nFor each **XML file** there is a **DTD file** associated which is used to ensure that the XML file follows the same rules for all XML files.\n\n## XML files\n- **raw.x86.Intel.AZ.xml**: Contains all instructions found in “Intel® 64 and IA-32 Architectures Software Developer Manuals volume 2”.\n- **\\*raw.x86.Intel.AVX512_r22.xml**: Contains all instructions found in “Intel® Architecture Instruction Set Extensions Programming Reference 319433-022”.\n- **raw.x86.Intel.AVX512_r24.xml**: Contains all instructions found in “Intel® Architecture Instruction Set Extensions Programming Reference 319433-024”.\n- **raw.x86.AMD.3DNow.xml**: Contains all instructions found in \"AMD 3DNow! Technology Manual\".\n- **raw.x86.AMD.SSE5.xml**: Contains all instructions found in \"AMD 128-Bit SSE5 Instruction Set\".\n- **raw.x86.AMD.XOP.xml**: Contains all instructions found in \"AMD64 Architecture Programmers Manual Volume 6: 128-Bit and 256-Bit XOP and FMA4 Instructions\".\n\n\\* means deprecated.\n\n## KEY TO ABBREVIATIONS\n  - **x32m** = 32-bit mode support.\n  - **x64m** = 64-bit mode support.\n  - **mnem** = Instruction Mnemonic.\n  - **args** = Instruction Arguments.\n  - **opc**  = Opcodes.\n  - **openc** = Operand Encoding name.\n  - **dscrp** = Description.\n  - **oprndenc** = Instruction Operand Encoding.\n  - **oprnd1** = Operand 1.\n  - **oprnd2** = Operand 2.\n  - **oprnd3** = Operand 3.\n  - **oprnd4** = Operand 4.\n\n***NOTE:*** FOR THE REST OF KEYS YOU SHOULD REFER TO INTEL/AMD DOCUMENTATIONS!\n\n## Example\nHere's a simple example of ADDPD instruction.\n```\n\u003ccommon\u003e\n\t\u003cbrief\u003eADDPD--Add Packed Double-Precision Floating-Point Values.\u003c/brief\u003e\n\t\u003cins x32m=\"V\" x64m=\"V\"\u003e\n\t\t\u003cmnem\u003eADDPD\u003c/mnem\u003e\n\t\t\u003cargs\u003exmm1,xmm2/m128\u003c/args\u003e\n\t\t\u003copc openc=\"RM\"\u003e66 0F 58 /r\u003c/opc\u003e\n\t\t\u003ccpuid\u003e\n\t\t\t\u003cflag\u003eSSE2\u003c/flag\u003e\n\t\t\u003c/cpuid\u003e\n\t\t\u003cdscrp\u003eAdd packed double-precision floating-point values from xmm2/m128 to xmm1.\u003c/dscrp\u003e\n\t\u003c/ins\u003e\n\t\u003cins x32m=\"V\" x64m=\"V\"\u003e\n\t\t\u003cmnem\u003eVADDPD\u003c/mnem\u003e\n\t\t\u003cargs\u003exmm1,xmm2,xmm3/m128\u003c/args\u003e\n\t\t\u003copc openc=\"RVM\"\u003eVEX.NDS.128.66.0F.WIG 58 /r\u003c/opc\u003e\n\t\t\u003ccpuid\u003e\n\t\t\t\u003cflag\u003eAVX\u003c/flag\u003e\n\t\t\u003c/cpuid\u003e\n\t\t\u003cdscrp\u003eAdd packed double-precision floating-point values from xmm3/mem to xmm2 and stores result in xmm1.\u003c/dscrp\u003e\n\t\u003c/ins\u003e\n\t\u003cins x32m=\"V\" x64m=\"V\"\u003e\n\t\t\u003cmnem\u003eVADDPD\u003c/mnem\u003e\n\t\t\u003cargs\u003eymm1,ymm2,ymm3/m256\u003c/args\u003e\n\t\t\u003copc openc=\"RVM\"\u003eVEX.NDS.256.66.0F.WIG 58 /r\u003c/opc\u003e\n\t\t\u003ccpuid\u003e\n\t\t\t\u003cflag\u003eAVX\u003c/flag\u003e\n\t\t\u003c/cpuid\u003e\n\t\t\u003cdscrp\u003eAdd packed double-precision floating-point values from ymm3/mem to ymm2 and stores result in ymm1.\u003c/dscrp\u003e\n\t\u003c/ins\u003e\n\t\u003coprndenc openc=\"RM\"\u003e\n\t\t\u003coprnd1\u003eModRM:reg(r,w)\u003c/oprnd1\u003e\n\t\t\u003coprnd2\u003eModRM:r/m(r)\u003c/oprnd2\u003e\n\t\t\u003coprnd3\u003eNA\u003c/oprnd3\u003e\n\t\t\u003coprnd4\u003eNA\u003c/oprnd4\u003e\n\t\u003c/oprndenc\u003e\n\t\u003coprndenc openc=\"RVM\"\u003e\n\t\t\u003coprnd1\u003eModRM:reg(w)\u003c/oprnd1\u003e\n\t\t\u003coprnd2\u003eVEX.vvvv(r)\u003c/oprnd2\u003e\n\t\t\u003coprnd3\u003eModRM:r/m(r)\u003c/oprnd3\u003e\n\t\t\u003coprnd4\u003eNA\u003c/oprnd4\u003e\n\t\u003c/oprndenc\u003e\n\u003c/common\u003e\n```\n\n[1]:111\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fmahdisafsafi%2Fparsable-instructions","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fmahdisafsafi%2Fparsable-instructions","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fmahdisafsafi%2Fparsable-instructions/lists"}