{"id":26351845,"url":"https://github.com/martinkindall/mips_cpu","last_synced_at":"2026-02-02T00:34:59.260Z","repository":{"id":64619513,"uuid":"573624462","full_name":"martinKindall/mips_cpu","owner":"martinKindall","description":"Single Cycle 32 bit MIPS","archived":false,"fork":false,"pushed_at":"2022-12-24T16:39:00.000Z","size":287,"stargazers_count":20,"open_issues_count":0,"forks_count":1,"subscribers_count":2,"default_branch":"main","last_synced_at":"2025-06-20T23:08:07.959Z","etag":null,"topics":["basys3","basys3-fpga","fpga","mips","mips-cpu","single-cycle","single-cycle-processor","systemverilog"],"latest_commit_sha":null,"homepage":"","language":"SystemVerilog","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":null,"status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/martinKindall.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":null,"code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null}},"created_at":"2022-12-02T23:27:26.000Z","updated_at":"2025-05-05T19:11:57.000Z","dependencies_parsed_at":"2023-01-30T21:01:12.380Z","dependency_job_id":null,"html_url":"https://github.com/martinKindall/mips_cpu","commit_stats":null,"previous_names":[],"tags_count":0,"template":false,"template_full_name":null,"purl":"pkg:github/martinKindall/mips_cpu","repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/martinKindall%2Fmips_cpu","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/martinKindall%2Fmips_cpu/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/martinKindall%2Fmips_cpu/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/martinKindall%2Fmips_cpu/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/martinKindall","download_url":"https://codeload.github.com/martinKindall/mips_cpu/tar.gz/refs/heads/main","sbom_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/martinKindall%2Fmips_cpu/sbom","scorecard":null,"host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":286080680,"owners_count":28997018,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2026-02-01T23:10:54.274Z","status":"ssl_error","status_checked_at":"2026-02-01T23:10:47.298Z","response_time":56,"last_error":"SSL_read: unexpected eof while reading","robots_txt_status":"success","robots_txt_updated_at":"2025-07-24T06:49:26.215Z","robots_txt_url":"https://github.com/robots.txt","online":false,"can_crawl_api":true,"host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["basys3","basys3-fpga","fpga","mips","mips-cpu","single-cycle","single-cycle-processor","systemverilog"],"created_at":"2025-03-16T10:34:59.482Z","updated_at":"2026-02-02T00:34:59.239Z","avatar_url":"https://github.com/martinKindall.png","language":"SystemVerilog","readme":"# MIPS 32 bits Single Cycle CPU\n\nThis project is based on the book [Digital Design and Computer Architecture](https://www.amazon.com/Digital-Design-Computer-Architecture-Harris/dp/0123944244/ref=sr_1_1?keywords=digital+design+and+computer+architecture\u0026qid=1670106216\u0026sprefix=digital+design%2Caps%2C178\u0026sr=8-1) and its example for a MIPS cpu written in Systemverilog.\n\nThe designs are in the folder __sources_1__ and the top module is _MipsTopIO.sv_.\nThe program files are _twoPlusTwo.asm_ and _twoPlusTwo.dat_.\n\nVideo:\nhttps://youtu.be/mYzHAQF_kyk\n","funding_links":[],"categories":[],"sub_categories":[],"project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fmartinkindall%2Fmips_cpu","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fmartinkindall%2Fmips_cpu","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fmartinkindall%2Fmips_cpu/lists"}