{"id":17766709,"url":"https://github.com/martinohanlon/philbinss","last_synced_at":"2025-03-15T13:30:56.124Z","repository":{"id":148705192,"uuid":"92102459","full_name":"martinohanlon/PhilbinSS","owner":"martinohanlon","description":"A Virtual Transistor Computer","archived":false,"fork":false,"pushed_at":"2019-08-26T18:15:02.000Z","size":9510,"stargazers_count":6,"open_issues_count":0,"forks_count":1,"subscribers_count":5,"default_branch":"master","last_synced_at":"2025-02-27T01:52:51.912Z","etag":null,"topics":["computer","python","ttl"],"latest_commit_sha":null,"homepage":"","language":"Python","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"mit","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/martinohanlon.png","metadata":{"files":{"readme":"README.rst","changelog":null,"contributing":null,"funding":null,"license":"LICENSE","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null}},"created_at":"2017-05-22T21:49:27.000Z","updated_at":"2024-09-11T21:53:02.000Z","dependencies_parsed_at":"2023-05-28T17:00:12.777Z","dependency_job_id":null,"html_url":"https://github.com/martinohanlon/PhilbinSS","commit_stats":null,"previous_names":[],"tags_count":0,"template":false,"template_full_name":null,"repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/martinohanlon%2FPhilbinSS","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/martinohanlon%2FPhilbinSS/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/martinohanlon%2FPhilbinSS/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/martinohanlon%2FPhilbinSS/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/martinohanlon","download_url":"https://codeload.github.com/martinohanlon/PhilbinSS/tar.gz/refs/heads/master","host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":243735799,"owners_count":20339531,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["computer","python","ttl"],"created_at":"2024-10-26T20:36:03.939Z","updated_at":"2025-03-15T13:30:56.117Z","avatar_url":"https://github.com/martinohanlon.png","language":"Python","funding_links":[],"categories":[],"sub_categories":[],"readme":"=========================\nPhilbin Silicon Simulator\n=========================\n\n*\"A virtual computer built from conceptual hardware created using software running on a real computer\"*\n\nA work in progress...  \n\nAfter watching `Crash Course Computer Science`_ I decided I wanted to make my own computer, after realising it would require a lot of transistors that I didn't have, I thought \"hey, if I could code one transistor, I could use it many times\".  \n\nI have no idea what I was thinking!\n\nThe heart of PhilbinSS is a Transistor simulator and the components required to connect transistors together. These components are the only place where logic is coded, all other functions are created by connecting transistors together. \n\nUsing these simple components you can create all the key elements of a computer - this is done through levels of abstraction:\n\n* Transistor \n  \n  * Not, And, Or \n  \n    * Xor  \n  \n      * Half Adder\n  \n        * Full Adder\n  \n          * 8 bit Ripple Carry Adder\n  \n            * and so on...  \n\nThe current highest level of abstraction is ``ALU`` or ``16 byte memory storage matrix`` or ``Master Slave JK Flip Flop`` (depending on your point of view!).\n\nThe project is named after the host of the show `Carrie Anne Philbin`_.\n\n`Martin O'Hanlon`_ `stuffaboutco.de`_ `@martinohanlon`_\n\nComponents\n==========\n\nUsing 3 simple components ``Transistor``, ``Split`` and ``Join`` you can create a computer.\n\nTransistor\n----------\n\nA transistor has 3 connections (collector, base, emitter), when the collector and base are supplied with power, power is sent to the emitter (output). The transistor has a 2nd output connected to the collector, which will be powered when the collector is powered but the base is not.\n\nYou can create a transistor and connect it up using::\n\n    from components import Transistor, Power\n    \n    # create the transistor and a power switch\n    t = Transistor()\n    p = Power()\n\n    # connect the power to the transistor's base \n    p.connect(t.base)\n    \n    # the emitter will be False because the power to the base is off \n    print(t.emitter)\n    # the output at the collector will be True\n    print(t.collector_output)\n    \n    # turn the power on to the base\n    p.on()\n\n    # the emitter will be True\n    print(t.emitter)\n    # the output at the collector will be False\n    print(t.collector_output)\n    \nBy default, power is supplied to the transistor's collector, you can create an unpowered transistor using:: \n\n    t = Transistor(connect_to_power = False)\n\nSplit\n-----\n\nIf you need to split an input to multiple nodes you can use a Split::\n\n    from components import Transistor, Power, Split\n    \n    # create transistors and a power\n    t1 = Transistor()\n    t2 = Transistor()\n    p = Power()\n\n    # create a split to both transistor bases \n    input_split = Split(t1.base, t2.base)\n\n    # connect up the power to split (and both transistor bases)\n    p.connect(input_split.input)\n\n    # both transistors are off\n    print(t1.emitter)\n    print(t2.emitter)\n\n    # turn the power on\n    p.on()\n\n    # both transistors are on\n    print(t1.emitter)\n    print(t2.emitter)\n\nJoin\n----\n\nIf you need to join many inputs to one output you can use a Join::\n\n    from components import Transistor, Power, Join\n\n    # create 2 switches and a transistor\n    p1 = Power()\n    p2 = Power()\n    t = Transistor()\n\n    # join the 2 outputs\n    output_join = Join(p1, p2)\n\n    # connect the output of te join to the transistor\n    output_join.output.connect(t.base)\n\n    # both powers are off, transistor is off\n    p1.off()\n    p2.off()\n    print(t.emitter)\n\n    # either power will turn on the emitter because they are joined\n    p1.on()\n    p2.off()\n    print(t.emitter)\n\n    p1.off()\n    p2.on()\n    print(t.emitter)\n\nLogic gates\n===========\n\nThe 4 logic gates, ``And``, ``Or``, ``Not`` and ``Xor`` are the base logic gates needed.\n\nAnd\n---\n\nAn And gate is created using 2 transistors, the base connections are the inputs, the output from transistor 1's emitter is connected to transistor 2's collector and the result is the output of transistor 2's emitter:\n\n|andlogicgate|\n\n::\n\n    from components import Transistor, Power\n\n    # create the transistors\n    t1 = Transistor()\n    t2 = Transistor(connect_to_power = False)\n\n    # create the power switches \n    input_a = Power()\n    input_b = Power()\n\n    # connect the inputs \n    input_a.connect(t1.base)\n    input_b.connect(t2.base)\n\n    # connect t1's emitter to t2's collector\n    t1.emitter.connect(t2.collector)\n\n    # create a variable for the output\n    output = t2.emitter\n\n    # both inputs are off, the output is False\n    input_a.off()\n    input_b.off()\n    print(output)\n\n    # one input is on, the output is still False\n    input_a.on()\n    input_b.off()\n    print(output)\n\n    # both inputs are on, the output is True\n    input_a.on()\n    input_b.on()\n    print(output)\n\nOr\n---\n\nAn Or gate is created by connecting 2 transistors in parallel, the base connections are the inputs, the output is the obtained by joining the emitters:\n\n|orlogicgate|\n\n::\n\n    from components import Transistor, Power, Join\n\n    # create the transistors\n    t1 = Transistor()\n    t2 = Transistor()\n\n    # create the power switches \n    input_a = Power()\n    input_b = Power()\n\n    # connect the inputs \n    input_a.connect(t1.base)\n    input_b.connect(t2.base)\n\n    # the output is the join of the 2 emitters.\n    output = Join(t1.emitter, t2.emitter).output\n\n    # both inputs are off, the output is False\n    input_a.off()\n    input_b.off()\n    print(output)\n\n    # input a is on, input b is off, the output is True\n    input_a.on()\n    input_b.off()\n    print(output)\n\n    # input a is off, input b is on, the output is True\n    input_a.off()\n    input_b.on()\n    print(output)\n\n    # both inputs are on, the output is True\n    input_a.on()\n    input_b.on()\n    print(output)\n\nNot \n---\n\nA not gate is made using a single transistor, the input is connected to the base, the output is connected to the collector:\n\n|notlogicgate|\n\n::\n\n    from components import Transistor, Power\n\n    # create the transistor\n    t = Transistor()\n\n    # create the power switch\n    theinput = Power()\n\n    # connect the input\n    theinput.connect(t.base)\n\n    # create a varibale for the output\n    output = t.collector_output\n\n    # input is off, the output is True\n    theinput.off()\n    print(output)\n\n    # input is on, the output is False\n    theinput.on()\n    print(output)\n\nXor\n---\n\nAn Xor gate is create by connecting And, Or and Not gates together.\n\n|xorlogicgate|\n\n::\n\n    from components import Power, Split\n    from logicgates import And, Or, Not\n    \n    # create swtiches\n    p1 = Power()\n    p2 = Power()\n\n    # create gates\n    a1 = And()\n    o = Or()\n    n = Not()\n    a2 = And()\n\n    # split input a and b to go to the and1 and or gate \n    input_a = Split(a1.input_a, o.input_a).input\n    input_b = Split(a1.input_b, o.input_b).input\n\n    # connect the switches\n    p1.connect(input_a)\n    p2.connect(input_b)\n\n    # output of and2 to not\n    a1.output.connect(n.input)\n    \n    # output of not to and2\n    n.output.connect(a2.input_a)\n    \n    # output of or to and2\n    o.output.connect(a2.input_b)\n    \n    # output is the result of and2\n    output = a2.output\n\n    # both inputs are off, the output is off\n    p1.off()\n    p2.off()\n    print(output)\n\n    # either input is on, the output is on\n    p1.off()\n    p2.on()\n    print(output)\n\n    p1.on()\n    p2.off()\n    print(output)\n\n    # both inputs are on, the output is off\n    p1.on()\n    p2.on()\n    print(output)\n\nAcknowledgements\n================\n\nThe following resources have been really useful in providing background information, tutorials and images.\n\n`Crash Course Computer Science`_\n\n`www.electronics-tutorials.ws`_\n\n`electronics.stackexchange.com`_\n\n`www.allaboutcircuits.com`_\n\n`www.falstad.com`_\n\n.. _Martin O'Hanlon: https://github.com/martinohanlon\n.. _stuffaboutco.de: http://stuffaboutco.de\n.. _@martinohanlon: https://twitter.com/martinohanlon\n.. _Carrie Anne Philbin: https://twitter.com/MissPhilbin \n\n.. _Crash Course Computer Science: https://www.youtube.com/watch?v=tpIctyqH29Q\u0026list=PL8dPuuaLjXtNlUrzyH5r6jN9ulIgZBpdo\n.. _www.electronics-tutorials.ws: http://www.electronics-tutorials.ws\n.. _electronics.stackexchange.com: https://electronics.stackexchange.com\n.. _www.allaboutcircuits.com: https://www.allaboutcircuits.com/\n.. _www.falstad.com: http://www.falstad.com/circuit/e-counter8.html\n\n.. |andlogicgate| image:: docs/images/and.png\n   :alt: and logic gate\n\n.. |orlogicgate| image:: docs/images/or.png\n   :alt: or logic gate\n\n.. |notlogicgate| image:: docs/images/not.png\n   :alt: not logic gate\n\n.. |xorlogicgate| image:: docs/images/xor.png\n   :alt: xor logic gate\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fmartinohanlon%2Fphilbinss","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fmartinohanlon%2Fphilbinss","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fmartinohanlon%2Fphilbinss/lists"}