{"id":23154841,"url":"https://github.com/matozinho/neander","last_synced_at":"2026-01-19T10:33:33.530Z","repository":{"id":46968547,"uuid":"408273433","full_name":"Matozinho/neander","owner":"Matozinho","description":"NEANDER - A basic theorical computer","archived":false,"fork":false,"pushed_at":"2021-09-20T03:12:15.000Z","size":1967,"stargazers_count":3,"open_issues_count":1,"forks_count":2,"subscribers_count":2,"default_branch":"main","last_synced_at":"2025-02-10T02:18:32.865Z","etag":null,"topics":["hardware","hardware-designs","neander","simulation","vhd","vhdl"],"latest_commit_sha":null,"homepage":"","language":"VHDL","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":null,"status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/Matozinho.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":null,"code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null}},"created_at":"2021-09-20T01:00:30.000Z","updated_at":"2023-05-10T01:54:39.000Z","dependencies_parsed_at":"2022-09-03T08:43:25.074Z","dependency_job_id":null,"html_url":"https://github.com/Matozinho/neander","commit_stats":null,"previous_names":[],"tags_count":0,"template":false,"template_full_name":null,"repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/Matozinho%2Fneander","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/Matozinho%2Fneander/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/Matozinho%2Fneander/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/Matozinho%2Fneander/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/Matozinho","download_url":"https://codeload.github.com/Matozinho/neander/tar.gz/refs/heads/main","host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":247215606,"owners_count":20903003,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["hardware","hardware-designs","neander","simulation","vhd","vhdl"],"created_at":"2024-12-17T20:14:54.280Z","updated_at":"2026-01-19T10:33:33.480Z","avatar_url":"https://github.com/Matozinho.png","language":"VHDL","funding_links":[],"categories":[],"sub_categories":[],"readme":"# \u003ch1 align=\"center\"\u003eNEANDER\u003c/h1\u003e\r\n\u003c!-- ALL-CONTRIBUTORS-BADGE:START - Do not remove or modify this section --\u003e\n[![All Contributors](https://img.shields.io/badge/all_contributors-3-orange.svg?style=flat-square)](#contributors-)\n\u003c!-- ALL-CONTRIBUTORS-BADGE:END --\u003e\n\r\n\u003cdiv align=\"center\"\u003e\r\n\t\u003ca href=\"Components\"\u003eComponents\u003c/a\u003e\r\n  \u003cspan\u003e • \u003c/span\u003e\r\n  \u003ca href=\"Adaptations\"\u003eAdaptions\u003c/a\u003e\r\n  \u003cspan\u003e • \u003c/span\u003e\r\n  \u003ca href=\"Implementation\"\u003eImplementation\u003c/a\u003e\r\n  \u003cp\u003e\u003c/p\u003e\r\n\u003c/div\u003e\r\n\r\n\u003e Project developed for the class of Digital System lectured by @Edmar-Bellorini by the students @Daniel-Boll @Felipi-Matozinho @Pablo-Hugen which compose the super team BDT (CFDT).\r\n\r\n---\r\n\r\n\r\n\r\n\u003cdiv\u003e\r\n  \u003cimg align=\"right\" src=\"https://github.com/Matozinho/neander/blob/main/images/NEANDER_logo.png\" width=240\u003e\r\n\r\n  \r\n  NEANDER is a computer architecture based on a 1945 description by John von Neumann and others in the First Draft of a Report on the EDVAC. That document describes a design architecture for an electronic digital computer with these components: \r\n  - A processing unit that contains an arithmetic logic unit and processor registers\r\n  - A control unit that contains an instruction register and program counter\r\n  - Memory that stores data and instructions\r\n  - External mass storage\r\n  - Input and output mechanisms\r\n\u003c/div\u003e\r\n\r\n---\r\n\r\n1. \u003ca href=\"Components\"\u003eComponents\u003c/a\u003e\u003cbr\u003e\r\n  1.1. \u003ca href=\"#ALU\"\u003eArithmetic Logic Unit\u003c/a\u003e\u003cbr\u003e\r\n  1.2. \u003ca href=\"#CU\"\u003eControl Unit\u003c/a\u003e\u003cbr\u003e\r\n  1.3. \u003ca href=\"#MEM\"\u003eMemory\u003c/a\u003e\u003cbr\u003e\r\n2. \u003ca href=\"Adaptations\"\u003eAdaptations\u003c/a\u003e\u003cbr\u003e\r\n  2.1. \u003ca href=\"JN and JZ\"\u003eJN and JZ\u003c/a\u003e\u003cbr\u003e\r\n3. \u003ca href=\"Implementation\"\u003eImplementation\u003c/a\u003e\u003cbr\u003e\r\n  3.1. \u003ca href=\"#Requirements\"\u003eRequirements\u003c/a\u003e\u003cbr\u003e\r\n  3.2. \u003ca href=\"#Instalation\"\u003eInstalation\u003c/a\u003e\u003cbr\u003e\r\n  3.3. \u003ca href=\"#Run\"\u003eRun\u003c/a\u003e\u003cbr\u003e\r\n  3.4. \u003ca href=\"#Structure\"\u003eStructure\u003c/a\u003e\u003cbr\u003e\r\n\r\n## Components\r\n\r\n### ALU\r\n\r\n\u003cdiv\u003e\r\n\u003cimg align=\"left\" src=\"https://github.com/Matozinho/neander/blob/main/images/02-moduloULA.png\" width=350\u003e\r\n\u003c/div\u003e\r\n\r\nThe Arithmetic Logic Unit as the image on the left suggest has 3 main components, which are:\r\n\r\n\u003cdiv\u003e\r\n\u003cimg align=\"right\" src=\"https://github.com/Matozinho/neander/blob/main/images/ULACore.png\" width=250\u003e\r\n\u003c/div\u003e\r\n\r\n- **ALU (core)**: This component is capable of execute any logical or arithmetic, under NEANDER constraints. They are `ADD`, `NOT`, `OR`, `AND`, `LDA`. Most of them can operate from two different sources `ADD`, `OR` and the `AND` operator extrictly both from the `AC` register and the data bus. `NOT` only operate data from the `AC` register and the `LDA` only from the data bus. **Every ALU operation is stored under the `AC` register**.\r\n- **AC**: Is the register to keep the operations data.\r\n- **FLAGS**: As the name suggests is the FLAGS that points properties from the `AC` register current data.\r\n\r\n### MEM\r\n\r\n\u003cdiv\u003e\r\n\u003cimg align=\"left\" src=\"https://github.com/Matozinho/neander/blob/main/images/03-moduloMEM.png\" width=350\u003e\r\n\u003c/div\u003e\r\n\r\nThe Memory Unit has 4 components, which are:\r\n\r\n- **MUX 2x8**: This mux selects if the address that will be sent to `MAR` (Memory Address Register) is comming from the `PC` (Program Counter) or the data bus. \r\n- **MAR**: Store the address received from the previous MUX an sent it to the `RAM` (Random Access Memory).\r\n- **RAM**: Is a memory of 256 bytes. On the read mode the memory will store in the `MDR` the data equivalent of the address passed from the `MAR`, otherwise in the write mode the memory will store on the address available in `MAR` the data comming from the data bus.\r\n- **MDR/MBR**: Both the `MDR` and the data bus will receive the data from the `RAM` if it's in the read mode.\r\n\r\n### CU\r\n\r\n\u003cdiv\u003e\r\n\u003cimg align=\"left\" src=\"https://github.com/Matozinho/neander/blob/main/images/04-modulosControle-RI.png\" width=150\u003e\r\n\u003c/div\u003e\r\n\r\nThe Control Unit is responsible for handling all the instructions related logic, like decoding and storing a instruction. It is divided in 4 main submodules\r\n\r\n- **CU** (Core): As the NEANDER is 8 clock-cycle-based all instructions will have the same time to execute, even though it don't need to make actions up until the cycle end. For every instruction the 3 firsts pulses are dedicated for searching the instruction and the increment of the `PC`. What the other 5 pulses does is trivial and it's up to the reader.   \r\n- **PC** (Program Counter): Stores the address of the next instruction to be executed. The only way of changing it is via jump instructions (`JMP`, `JN` or `JZ`).\r\n- **IR** (Instruction Register): Contains the current instruction data.\r\n- **Decoder**: Output the instruction in a format like `8 bits` in -\u003e `11 bits` out. From those 8 bits that enters, actually only 4 MSbits are used.\r\n\r\n## Adaptions\r\n\r\n### JN and JZ\r\n\r\nAs no documentation on how to implent the jumps `JN` (Jump if Negative) and `JZ` (Jump if Zero) was provided we decided to adapt it using a MUX2x11 that when the selector is `'1'` the output is equivalent of a normal `JMP` otherwise the output will be equivalent as a `NOP`. \r\n\r\n## Implementation\r\n\r\nAs we had and ally, or as we call a god's gift, called Pablo we manage to come up and turn a masive one root folder structure to a `well delightful syntatic-tree design`.\r\n\r\nAnyone with `make` can easily run as follows\r\n\r\n### Requirements\r\n\r\nYou will have to have installed the following programs `(git|gh-cli) ghdl gtkwave make`\r\n\r\n### Instalation\r\n\r\n```zsh\r\ngh repo clone Matozinho/neander\r\n```\r\n\r\nor\r\n\r\n```zsh\r\ngit clone git@github.com:Matozinho/neander.git\r\n```\r\n\r\nor if you are old as a NEANDER itself\r\n\r\n```zsh\r\ngit clone https://github.com/Matozinho/neander.git\r\n```\r\n\r\n### Run\r\n\r\n```zsh\r\ncd neander\r\nmake clean # just as good practice 😉\r\nmake       # Will compile\r\nmake run STOPTIME=(stop time needed) MEM=(memfile)\r\nmake view  # Will open GTKWave\r\n```\r\n\r\n### Structure\r\n\r\n```zsh\r\n.\r\n├── assets\r\n│   ├── mem\r\n│   │   ├── 1neanderram.mem\r\n│   │   ├── 2neanderram.mem\r\n│   │   ├── 3neanderram.mem\r\n│   │   ├── 4neanderram.mem\r\n│   │   ├── 5neanderram.mem\r\n│   │   ├── 6neanderram.mem\r\n│   │   ├── 7neanderram.mem\r\n│   │   ├── 8_JZneanderram.mem\r\n│   │   ├── 9neanderram.mem\r\n│   │   └── neanderram.mem\r\n│   ├── neander.gtkw\r\n│   └── waves\r\n│       └── tb_neander.ghw\r\n├── Makefile\r\n├── neanderram.mem\r\n├── README.md\r\n└── src\r\n    └── neander\r\n        ├── components\r\n        │   ├── alu\r\n        │   │   ├── alu.vhdl\r\n        │   │   ├── components\r\n        │   │   │   ├── ac.vhdl\r\n        │   │   │   ├── alu_mux.vhdl\r\n        │   │   │   ├── core.vhdl\r\n        │   │   │   ├── fadder_8.vhdl\r\n        │   │   │   ├── fadder.vhdl\r\n        │   │   │   └── flags.vhdl\r\n        │   │   └── testbench\r\n        │   │       └── tb_alu.vhdl\r\n        │   ├── cu\r\n        │   │   ├── components\r\n        │   │   │   ├── cicles\r\n        │   │   │   │   ├── add_cicle.vhdl\r\n        │   │   │   │   ├── and_cicle.vhdl\r\n        │   │   │   │   ├── hlt_cicle.vhdl\r\n        │   │   │   │   ├── jmp_cicle.vhdl\r\n        │   │   │   │   ├── jn_cicle.vhdl\r\n        │   │   │   │   ├── jz_cicle.vhdl\r\n        │   │   │   │   ├── lda_cicle.vhdl\r\n        │   │   │   │   ├── nop_cicle.vhdl\r\n        │   │   │   │   ├── not_cicle.vhdl\r\n        │   │   │   │   ├── or_cicle.vhdl\r\n        │   │   │   │   └── sta_cicle.vhdl\r\n        │   │   │   ├── control_ffjk7.vhdl\r\n        │   │   │   ├── count07.vhdl\r\n        │   │   │   ├── decoder.vhdl\r\n        │   │   │   ├── ir.vhdl\r\n        │   │   │   └── uc_core.vhdl\r\n        │   │   ├── cu.vhdl\r\n        │   │   └── testbench\r\n        │   ├── ffjktd.vhdl\r\n        │   ├── mem\r\n        │   │   ├── components\r\n        │   │   │   ├── as_ram.vhdl\r\n        │   │   │   ├── mar.vhdl\r\n        │   │   │   ├── mdr.vhdl\r\n        │   │   │   ├── mem_mux.vhdl\r\n        │   │   │   └── neanderram.mem\r\n        │   │   ├── mem.vhdl\r\n        │   │   └── testbench\r\n        │   └── pc\r\n        │       ├── components\r\n        │       │   ├── pc_mux.vhdl\r\n        │       │   └── rip.vhdl\r\n        │       └── pc.vhdl\r\n        ├── neander.vhdl\r\n        └── testbench\r\n            ├── tb_neander.ghw\r\n            ├── tb_neander.gtkw\r\n            ├── tb_neander.vhdl\r\n            ├── tb_ula_mem.ghw\r\n            └── tb_ula_mem.vhdl\r\n\r\n19 directories, 56 files\r\n```\r\n\n## Contributors ✨\n\nThanks goes to these wonderful people ([emoji key](https://allcontributors.org/docs/en/emoji-key)):\n\n\u003c!-- ALL-CONTRIBUTORS-LIST:START - Do not remove or modify this section --\u003e\n\u003c!-- prettier-ignore-start --\u003e\n\u003c!-- markdownlint-disable --\u003e\n\u003ctable\u003e\n  \u003ctr\u003e\n    \u003ctd align=\"center\"\u003e\u003ca href=\"https://github.com/Daniel-Boll\"\u003e\u003cimg src=\"https://avatars.githubusercontent.com/u/43689101?v=4?s=100\" width=\"100px;\" alt=\"\"/\u003e\u003cbr /\u003e\u003csub\u003e\u003cb\u003eDaniel Boll\u003c/b\u003e\u003c/sub\u003e\u003c/a\u003e\u003cbr /\u003e\u003ca href=\"https://github.com/Matozinho/neander/commits?author=Daniel-Boll\" title=\"Code\"\u003e💻\u003c/a\u003e \u003ca href=\"https://github.com/Matozinho/neander/commits?author=Daniel-Boll\" title=\"Documentation\"\u003e📖\u003c/a\u003e\u003c/td\u003e\n    \u003ctd align=\"center\"\u003e\u003ca href=\"https://github.com/Matozinho\"\u003e\u003cimg src=\"https://avatars.githubusercontent.com/u/50120388?v=4?s=100\" width=\"100px;\" alt=\"\"/\u003e\u003cbr /\u003e\u003csub\u003e\u003cb\u003eFelipi Lima Matozinho\u003c/b\u003e\u003c/sub\u003e\u003c/a\u003e\u003cbr /\u003e\u003ca href=\"https://github.com/Matozinho/neander/commits?author=Matozinho\" title=\"Code\"\u003e💻\u003c/a\u003e \u003ca href=\"https://github.com/Matozinho/neander/commits?author=Matozinho\" title=\"Documentation\"\u003e📖\u003c/a\u003e\u003c/td\u003e\n    \u003ctd align=\"center\"\u003e\u003ca href=\"https://github.com/Tomcat-42\"\u003e\u003cimg src=\"https://avatars.githubusercontent.com/u/44649669?v=4?s=100\" width=\"100px;\" alt=\"\"/\u003e\u003cbr /\u003e\u003csub\u003e\u003cb\u003ePablo Alessandro Santos Hugen\u003c/b\u003e\u003c/sub\u003e\u003c/a\u003e\u003cbr /\u003e\u003ca href=\"https://github.com/Matozinho/neander/commits?author=Tomcat-42\" title=\"Code\"\u003e💻\u003c/a\u003e \u003ca href=\"https://github.com/Matozinho/neander/commits?author=Tomcat-42\" title=\"Documentation\"\u003e📖\u003c/a\u003e\u003c/td\u003e\n  \u003c/tr\u003e\n\u003c/table\u003e\n\n\u003c!-- markdownlint-restore --\u003e\n\u003c!-- prettier-ignore-end --\u003e\n\n\u003c!-- ALL-CONTRIBUTORS-LIST:END --\u003e\n\nThis project follows the [all-contributors](https://github.com/all-contributors/all-contributors) specification. Contributions of any kind welcome!","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fmatozinho%2Fneander","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fmatozinho%2Fneander","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fmatozinho%2Fneander/lists"}