{"id":17864860,"url":"https://github.com/mattvenn/basic-ecp5-pcb","last_synced_at":"2025-04-02T21:30:13.822Z","repository":{"id":48620513,"uuid":"280209235","full_name":"mattvenn/basic-ecp5-pcb","owner":"mattvenn","description":"Reference design for Lattice ECP5 FPGA. Featuring Raspberry Pi interface and 6 PMODs","archived":false,"fork":false,"pushed_at":"2021-07-17T12:49:47.000Z","size":9297,"stargazers_count":107,"open_issues_count":4,"forks_count":23,"subscribers_count":10,"default_branch":"master","last_synced_at":"2025-04-01T18:09:53.415Z","etag":null,"topics":["fpga","hardware","pcb"],"latest_commit_sha":null,"homepage":"","language":"Verilog","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"cc0-1.0","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/mattvenn.png","metadata":{},"created_at":"2020-07-16T16:55:41.000Z","updated_at":"2025-04-01T06:31:32.000Z","dependencies_parsed_at":"2022-09-15T20:51:21.591Z","dependency_job_id":null,"html_url":"https://github.com/mattvenn/basic-ecp5-pcb","commit_stats":null,"previous_names":[],"tags_count":0,"template":false,"template_full_name":null,"repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/mattvenn%2Fbasic-ecp5-pcb","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/mattvenn%2Fbasic-ecp5-pcb/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/mattvenn%2Fbasic-ecp5-pcb/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/mattvenn%2Fbasic-ecp5-pcb/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/mattvenn","download_url":"https://codeload.github.com/mattvenn/basic-ecp5-pcb/tar.gz/refs/heads/master","host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":246895536,"owners_count":20851285,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["fpga","hardware","pcb"],"created_at":"2024-10-28T09:17:06.760Z","updated_at":"2025-04-02T21:30:13.797Z","avatar_url":"https://github.com/mattvenn.png","language":"Verilog","funding_links":[],"categories":["ECP5"],"sub_categories":[],"readme":null,"project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fmattvenn%2Fbasic-ecp5-pcb","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fmattvenn%2Fbasic-ecp5-pcb","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fmattvenn%2Fbasic-ecp5-pcb/lists"}