{"id":27010994,"url":"https://github.com/mrtaz77/computer-architecture","last_synced_at":"2026-02-16T17:36:56.415Z","repository":{"id":229408350,"uuid":"720655587","full_name":"mrtaz77/Computer-Architecture","owner":"mrtaz77","description":"Computer Architecture Projects ","archived":false,"fork":false,"pushed_at":"2024-11-27T17:01:43.000Z","size":15095,"stargazers_count":4,"open_issues_count":1,"forks_count":1,"subscribers_count":1,"default_branch":"main","last_synced_at":"2025-10-05T04:28:54.939Z","etag":null,"topics":["arithmetic-logic-unit","computer-architecture","floating-point-adder","logisim","mips-architecture","proteus"],"latest_commit_sha":null,"homepage":"","language":"TeX","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"apache-2.0","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/mrtaz77.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":"LICENSE","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null}},"created_at":"2023-11-19T06:39:40.000Z","updated_at":"2025-09-03T03:54:42.000Z","dependencies_parsed_at":"2025-04-04T11:40:26.401Z","dependency_job_id":null,"html_url":"https://github.com/mrtaz77/Computer-Architecture","commit_stats":null,"previous_names":["mrtaz77/computer-architecture"],"tags_count":0,"template":false,"template_full_name":null,"purl":"pkg:github/mrtaz77/Computer-Architecture","repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/mrtaz77%2FComputer-Architecture","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/mrtaz77%2FComputer-Architecture/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/mrtaz77%2FComputer-Architecture/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/mrtaz77%2FComputer-Architecture/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/mrtaz77","download_url":"https://codeload.github.com/mrtaz77/Computer-Architecture/tar.gz/refs/heads/main","sbom_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/mrtaz77%2FComputer-Architecture/sbom","scorecard":null,"host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":286080680,"owners_count":29514033,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2026-02-16T09:05:14.864Z","status":"ssl_error","status_checked_at":"2026-02-16T08:55:59.364Z","response_time":115,"last_error":"SSL_read: unexpected eof while reading","robots_txt_status":"success","robots_txt_updated_at":"2025-07-24T06:49:26.215Z","robots_txt_url":"https://github.com/robots.txt","online":false,"can_crawl_api":true,"host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["arithmetic-logic-unit","computer-architecture","floating-point-adder","logisim","mips-architecture","proteus"],"created_at":"2025-04-04T11:28:02.008Z","updated_at":"2026-02-16T17:36:56.377Z","avatar_url":"https://github.com/mrtaz77.png","language":"TeX","funding_links":[],"categories":[],"sub_categories":[],"readme":"# Computer-Architecture\nA collection of the projects done under the computer architecture course of undergrad.\n\n## Navigation\n* [Tools](#tools)\n* [Projects](#projects)\n* [Contents](#contents)\n\n## Tools\n1. Logisim(2.7.1), download [EXE](https://sourceforge.net/projects/circuit/files/2.7.x/2.7.1/) (Requires JRE 1.5.0) or [JAR](https://sourceforge.net/projects/circuit/files/2.7.x/2.7.1/logisim-generic-2.7.1.jar/download) (Works for JRE \u003e= 1.5.0).  _Open .circ files using this._\n2. Atmel Studio 7.0 . Download [link](https://www.microchip.com/en-us/tools-resources/archives/avr-sam-mcus)\n3. Proteus Version 8.15. Download [link](https://engineeringsoftware.net/electronics/proteus-8-15-full-crack/). _Open .pdsprj files using this._\n4. Extreme burner. Download [link](https://extreme-burner-avr.software.informer.com/1.4/). _For burning hex files into atmega32 for hardware simulation_\n\n### Issue with 7400-lib.circ Logisim Library \nThe originally downloaded [7400-lib.circ](/Projects/ALU/Circuits/7400-lib.circ) had a bug related to the IC-7483. The $C_{out}$ pin was an input pin instead of the desired output pin.This issue was solved using this [.circ](./Projects/ALU/Circuits/IC%207483.circ) file. Also some changes were made to the 7400-lib.circ file for the design.\n\n## Projects\n- [Arithmetic Logic Unit : ALU](#alu)\n- [Floating Point Adder : FPA](#fpa)\n- [Microprocessor without Interlocked Pipelined Stages : MIPS](#mips)\n\n## Contents\n|Folder|[ALU](/Projects/ALU/)|[FPA](/Projects/FPA/)|[MIPS](/Projects/MIPS/)|\n|-|-|-|-|\n|Specification|[..](/Projects/ALU/CSE-306-Assignment-1-V1.pdf)|[..](/Projects/FPA/306_FP_Adder.pdf)|[..](/Projects/MIPS/CSE306_MIPS_July23.pdf)|\n|Report|[..](/Projects/ALU/Report/A1_Group6.pdf)|[..](/Projects/FPA/Report/main.pdf)|[..](/Projects/MIPS/Report/MIPSreport.pdf)|\n|Logisim Circuit|[..](/Projects/ALU/Circuits/final%20ALU.circ)|[..](/Projects/FPA/Circuits/FloatingPointAdder.circ)|[..](/Projects/MIPS/Circuits/MIPS.circ)|\n\n# ALU\n![ALU img](/Projects/ALU/Images/hardware.jpg)\n\n## Content\n- [Circuit Design](#circuit-design)\n- [Software Simulation](#software-simulation-alu)\n- [Usefool Tools](#useful-tools)\n\t- Wire Counter\n\t- Tester (Credit to [aaniksahaa](https://github.com/aaniksahaa) for this amazing tester, I modified it to support file output)\n- [ICs and symbols used](#ics-and-symbols-used)\n\n## Circuit Design \nThe original circuit had a bug which were fixed using this [file](/Projects/ALU/Fix.md). \\\nAlso for the intuitions behind the design check [optimization](/Projects/ALU/Optimization.md)\n\n## Software Simulation ALU\n![logisim_ALU](/Projects/ALU/Report/Util/main.png)\n\n## Useful Tools\n- [Wire Counter](/Projects/ALU/wireCount.py) calculates the number of wires used in a .circ file. \n\t- Make sure that your.circ file(whose wire is to be counted) and the wireCount.py are in the same directory.\n\t- Replace the file_path with the name of `your.circ` and run the .py.\n\t- An estimate will be given.\n\n- [Tester](/Projects/ALU/Tester/check_ALU.py) checks whether the truth table generated from the ALU.circ is correct or not.\n\t* Open the circuit in Logisim\n\t* Go to the `Project` tab and click `Analyze Circuit`\n\t* A warning dialog box may appear, click `OK`\n\t* The truth table is shown.\n\t* Press `Ctrl`+`A`. Copy.\n\t* Paste the output here in `truth_table.txt`\n\t* **Most importantly, in the code, change the check_row function's following fragment as per your specifications.**\n\t```cpp\n\tif(control == 0):\n        Y = A + 2**n_bits - 1\n    if(control == 1):\n        Y = A + 2**n_bits - B - 1\n    if(control == 2):\n        Y = A + 2**n_bits - 1\n    if(control == 3):\n        Y = 2**n_bits - A // negation\n    if(control == 4):\n        Y = A + 2**n_bits - B\n    if(control == 5):\n        Y = A \u0026 B\n    if(control == 6):\n        Y = A ^ B\n    if(control == 7):\n        Y = A ^ B\n\t```\n\t* Run `check_ALU.py`\n\t* For the entire report, check the generated `report.txt`.\n\n\n\tThe followed naming convention:\n\n\t\tControl bits = cs0, cs1, cs2\n\t\tA            = A0, A1 etc\n\t\tB            = B0, B1 etc\n\t\tS            = S0, S1 etc\n\t\tCout         = Cout\n\t\tC, V, S and Z are the status flags\n\n### ICs and symbols used\n[Here](/Projects/ALU/Gates.md) is a list of ICs, symbols and their meanings used in the ALU.\n\n# FPA\n### Software Simulation FPA\n\n![logisim_FPA](/Projects/FPA/Report/Util/FPA.png)\n\n# MIPS\n\n![mips_hardware](/Projects/MIPS/Report/Images/hardware.jpg)\n\n- [Software Simulation](#software-simulation-mips)\n- [Asm Compiler](/Projects/MIPS/Compiler/asm_compiler.py)\n- [How to run](#how-to-run)\n\n## Software Simulation MIPS\n### Logisim\n![logisim_MIPS](/Projects/MIPS/Report/Images/Main%20circuit.png)\n### Proteus\n![proteus_MIPS](/Projects/MIPS/Report/Images/mips_proteus.png)\n\n## How to run\n1. Go to the [Compiler](/Projects/MIPS/Compiler/) directory and open a .asm file with the desired mips assembly code.\n2. Run the [asm_compiler.py](/Projects/MIPS/Compiler/asm_compiler.py).\n```\npython asm_compiler.py \u003cinput\u003e.asm\n```\n3. The following files will be formed. \\\n\t**intermediate.asm** - Asm file with intermediate code for push and pop instructions.\\\n\t**log.txt** - Log file for the resulting hex code of all instructions and any error if found. \\\n\t**instruction.hex** - Hex code for instruction memory for logisim simulation. \\\n\t**atmega32_instruction.txt** - Hex code for instruction memory for atmega32 simulations used in proteus and hardware design.\n4. **Proteus and hardware simulation**\n\t- Copy the `atmega32_instruction.txt`.\n\t- Open the [main.c](/Projects/MIPS/Codes%20\u0026%20Simulation/Instruction%20Memory/main.c) in atmel studio and navigate to the **unsigned int instruction[256]** array. This is the instruction memory of our mips. Paste the instructions copied as R.H.S of this array.\n\t- Build the solution and a new hex file will be formed.\n\t\t- For hardware simulation, burn this hex file into the atmega32 simulating the instruction memory using extreme burner.\n\t\t- For proteus simulation, open the [circuit](/Projects/MIPS/Codes%20\u0026%20Simulation/MIPS%20circuit.pdsprj) using proteus. Go to the atmega32 with the name **Instruction Memory** and load the hex file formed into it.\n\t- **Clock is negative edge triggered**. Execute next instruction via clock. Also, supports a reset switch for reseting program counter.\n5. **Logisim simulation**\n\t- Open the [circuit](/Projects/MIPS/Circuits/MIPS.circ) in logisim and follow the video to load the instruction.hex into intruction memory.\n\t\u003cp align=\"left\"\u003e\n\t\t\u003cvideo src=\"https://github.com/mrtaz77/Computer-Architecture/assets/113765142/7c402a1f-811e-405a-8117-ec8926907b31\" autoplay loop muted\u003e\n\t\t\u003c/video\u003e\n\t\u003c/p\u003e\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fmrtaz77%2Fcomputer-architecture","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fmrtaz77%2Fcomputer-architecture","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fmrtaz77%2Fcomputer-architecture/lists"}