{"id":15035305,"url":"https://github.com/nvidia/cutlass","last_synced_at":"2025-05-13T21:03:01.885Z","repository":{"id":38260206,"uuid":"112542515","full_name":"NVIDIA/cutlass","owner":"NVIDIA","description":"CUDA Templates for Linear Algebra Subroutines","archived":false,"fork":false,"pushed_at":"2025-05-04T04:25:21.000Z","size":51112,"stargazers_count":7403,"open_issues_count":304,"forks_count":1214,"subscribers_count":113,"default_branch":"main","last_synced_at":"2025-05-06T02:59:17.037Z","etag":null,"topics":["cpp","cuda","deep-learning","deep-learning-library","gpu","nvidia"],"latest_commit_sha":null,"homepage":"","language":"C++","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"other","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/NVIDIA.png","metadata":{"files":{"readme":"README.md","changelog":"CHANGELOG.md","contributing":null,"funding":null,"license":"LICENSE.txt","code_of_conduct":null,"threat_model":null,"audit":null,"citation":"CITATION.cff","codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null,"zenodo":null}},"created_at":"2017-11-30T00:11:24.000Z","updated_at":"2025-05-06T02:47:09.000Z","dependencies_parsed_at":"2023-09-27T02:41:16.221Z","dependency_job_id":"5e1e4c86-0265-4ba8-81e8-34e2de400dea","html_url":"https://github.com/NVIDIA/cutlass","commit_stats":{"total_commits":503,"total_committers":165,"mean_commits":"3.0484848484848484","dds":0.8906560636182903,"last_synced_commit":"5b50a8faafe59a9341ca89083f1eb7bc7065abfa"},"previous_names":[],"tags_count":36,"template":false,"template_full_name":null,"repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/NVIDIA%2Fcutlass","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/NVIDIA%2Fcutlass/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/NVIDIA%2Fcutlass/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/NVIDIA%2Fcutlass/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/NVIDIA","download_url":"https://codeload.github.com/NVIDIA/cutlass/tar.gz/refs/heads/main","host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":252612466,"owners_count":21776255,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["cpp","cuda","deep-learning","deep-learning-library","gpu","nvidia"],"created_at":"2024-09-24T20:28:07.810Z","updated_at":"2025-05-06T02:59:25.324Z","avatar_url":"https://github.com/NVIDIA.png","language":"C++","readme":"![ALT](./media/images/gemm-hierarchy-with-epilogue-no-labels.png \"Complete CUDA GEMM decomposition\")\n\n# CUTLASS 3.9.2\n\n_CUTLASS 3.9.2 - May 2025_\n\nCUTLASS is a collection of CUDA C++ template abstractions for implementing\nhigh-performance matrix-matrix multiplication (GEMM) and related computations at all levels \nand scales within CUDA. It incorporates strategies for hierarchical decomposition and \ndata movement similar to those used to implement cuBLAS and cuDNN.  CUTLASS decomposes \nthese \"moving parts\" into reusable, modular software components abstracted by C++ template \nclasses.  Primitives for different levels of a conceptual parallelization hierarchy\ncan be specialized and tuned via custom tiling sizes, data types,\nand other algorithmic policy. The resulting flexibility simplifies their use\nas building blocks within custom kernels and applications.\n\nTo support a wide variety of applications, CUTLASS provides extensive support for\nmixed-precision computations, providing specialized data-movement and\nmultiply-accumulate abstractions for FP64, FP32, TF32, FP16, BF16,\n[FP32 emulation via tensor core instruction](./examples/27_ampere_3xtf32_fast_accurate_tensorop_gemm), \n 8b floating point types (e5m2 and e4m3),\n block scaled data types (NVIDIA NVFP4 and OCP standard MXFP4, MXFP6, MXFP8),\n narrow integer types (4 and 8b signed and unsigned integers),\n and binary 1b data types (where architectures allow for the\nnative support of such data types).\nCUTLASS demonstrates optimal matrix multiply operations\ntargeting the programmable, high-throughput _Tensor Cores_ implemented by\nNVIDIA's Volta, Turing, Ampere, Ada, Hopper, and Blackwell architectures.\n\nIn addition to GEMMs, CUTLASS implements high-performance convolution via\nthe implicit GEMM algorithm. Implicit GEMM is the formulation of a convolution\noperation as a GEMM thereby taking advantage of CUTLASS's modular GEMM pipeline.\nThis allows CUTLASS to build convolutions by reusing highly-optimized GEMM components.\n\nSee the [Quick Start Guide](./media/docs/cpp/quickstart.md) to get started quickly.\n\nSee the [functionality docs](./media/docs/cpp/functionality.md) for a more comprehensive\nlist of kernel level features, data types, instructions, and minimum supported by CUTLASS on each GPU\narchitecture.\n\n# What's New in CUTLASS 3.9\n\n* Support for Blackwell SM120 kernels for GeForce GPUs in CUTLASS 3.x API:\n  - Collective mainloops that target for:\n    * [Blockscaled datatypes with support for dense GEMM](./include/cutlass/gemm/collective/sm120_blockscaled_mma_tma.hpp)\n    * [Blockscaled datatypes with support for sparse GEMM](./include/cutlass/gemm/collective/sm120_blockscaled_sparse_mma_tma.hpp)\n  - New [GEMM](./include/cutlass/gemm/dispatch_policy.hpp) and [epilogue](./include/cutlass/epilogue/dispatch_policy.hpp) dispatch policies for collectives, kernel layers, and builders.\n  - [Blackwell SM120 epilogue](./include/cutlass/epilogue/fusion/sm120_visitor_store_tma_warpspecialized.hpp) and [full set of EVT fusions](./include/cutlass/epilogue/fusion/sm120_callbacks_tma_warpspecialized.hpp).\n* Set of examples that demonstrate the usage of the 3.x API for targeting Blackwell SM120 architecture:\n  - [Blockscaled GEMM with NVFP4 input datatype and BF16 output tensor](./examples/79_blackwell_geforce_gemm/79a_blackwell_geforce_nvfp4_bf16_gemm.cu).\n  - [Blockscaled GEMM with NVFP4 input datatype and NVFP4 output tensor with scale factor generation](./examples/79_blackwell_geforce_gemm/79b_blackwell_geforce_nvfp4_nvfp4_gemm.cu).\n  - [Blockscaled GEMM with mixed input datatype (MXFP8 and MXFP6) and BF16 output tensor](./examples/79_blackwell_geforce_gemm/79c_blackwell_geforce_mixed_mxfp8_mxfp6_bf16_gemm.cu).\n  - [Grouped GEMM with nvfp4 datatype](./examples/79_blackwell_geforce_gemm/79d_blackwell_geforce_nvfp4_grouped_gemm.cu).\n  - [Sparse Blockscaled GEMM with mxfp8 input datatype and BF16 output tensor](./examples/80_blackwell_geforce_sparse_gemm/80a_blackwell_geforce_mxfp8_bf16_sparse_gemm.cu).\n  - [Sparse Blockscaled GEMM with NVFP4 input datatype and NVFP4 output tensor](./examples/80_blackwell_geforce_sparse_gemm/80b_blackwell_geforce_nvfp4_nvfp4_sparse_gemm.cu).\n* Set of unit tests that demonstrate the usage of both [sparse](./test/unit/gemm/device/sm120_blockscaled_sparse_tensorop_gemm/) and [dense](./test/unit/gemm/device/sm120_blockscaled_tensorop_gemm/) Blackwell SM120 blockscaled GEMM.\n* Support for Blackwell SM100 Sparse kernels:\n  - Collective mainloop that target for\n    * [SM100 Sparse GEMM](./include/cutlass/gemm/collective/sm100_sparse_mma_warpspecialized.hpp)\n* Set of example that demonstrate the usage of the 3.x API for targeting Blackwell SM100 Sparse GEMM:\n  - [Sparse GEMM](./examples/83_blackwell_sparse_gemm/83_blackwell_sparse_gemm.cu)\n  - [Blockscaled Sparse GEMM with NVFP4 input data type](./examples/84_blackwell_narrow_precision_sparse_gemm/84a_blackwell_nvfp4_bf16_sparse_gemm.cu)\n  - [Blockscaled Sparse GEMM with mixed input data type (MXFP8 and MXFP4)](./examples/84_blackwell_narrow_precision_sparse_gemm/84b_blackwell_mixed_mxfp8_bf16_sparse_gemm.cu)\n* Set of unit tests that demonstrate the usage of [sparse](./test/unit/gemm/device/sm100_sparse_tensorop_gemm) and [blockscaled sparse](./test/unit/gemm/device/sm100_blockscaled_sparse_tensorop_gemm) Blackwell SM100 GEMM.\n* A new Multi-head Latent Attention (MLA) for SM100 Blackwell architecture in CUTLASS [example](./examples/77_blackwell_fmha/) covers the flashMLA-like weight-absorbed decoding use-case.\n* A new FMHA Backward kernel for SM100 Blackwell architecture extends CUTLASS [example](./examples/77_blackwell_fmha/) to show how the five backward pass MMAs can be fused into a single kernel to achieve high performance.\n* A new [distributed GEMM example](./examples/82_blackwell_distributed_gemm/82_blackwell_distributed_gemm.cu) for SM100 Blackwell architecture.\n* Enhancement and new support of block-wise and group-wise GEMM for Hopper and Blackwell architectures:\n  - Enhancement of [blockwise GEMM](./examples/67_hopper_fp8_warp_specialized_gemm_with_blockwise_scaling/67_hopper_fp8_warp_specialized_gemm_with_blockwise_scaling.cu) for Hopper architecture.\n  - Enhancement of [groupwise GEMM](./examples/67_hopper_fp8_warp_specialized_gemm_with_blockwise_scaling/67_hopper_fp8_warp_specialized_gemm_with_groupwise_scaling.cu) for Hopper architecture.\n  - Support for [grouped GEMM with blockwise and groupwise scaling](./examples/68_hopper_fp8_warp_specialized_grouped_gemm_with_blockwise_scaling/) for Hopper architecture.\n  - Support for [grouped-wise GEMM](./tools/profiler/src/blockwise_gemm_operation_profiler.cu) in CUTLASS profiler.\n  - Support for [blockwise GEMM](./examples/81_blackwell_gemm_blockwise/81_blackwell_gemm_blockwise.cu) for Blackwell architecture.\n  - Support for [groupwise GEMM](./examples/81_blackwell_gemm_blockwise/81_blackwell_gemm_groupwise.cu) for Blackwell architecture.\n  - Support for [grouped GEMM with blockwise](./examples/81_blackwell_gemm_blockwise/81_blackwell_grouped_gemm_blockwise.cu) and [groupwise scaling](./examples/81_blackwell_gemm_blockwise/81_blackwell_grouped_gemm_groupwise.cu) for Blackwell architecture.\n* Added support for enhanced kernel performance search (auto-tuning) in CUTLASS profiler:\n  - Sorting performance results by GFLOPs/second: Users can now sort the final performance report based on GFLOPs/second, making it easier to identify the most efficient kernels.\n  - Exhaustive search for best kernel performance in GFLOPs/second: The profiler now searches for the best-performing kernel across a range of problem sizes, swizzle sizes, rasterization orders, and dynamic cluster configurations to maximize performance.\n  - Performance search under a fixed GEMM shape: Enables exhaustive tuning within a fixed GEMM shape, exploring various kernel parameters to find the best configuration.\n  - More detailed introductions and examples to leverage this feature can be found in [profiler.md](./media/docs/cpp/profiler.md#exhaustive-search-mode-and-top-k-output-ranking-according-to-performance-in-gflopss).\n* Support `void` as the D element in sm100 kernel epilogues.\n\nNote: CUTLASS 3.x builds are known to be down on Windows platforms for all CUDA toolkits.\nCUTLASS team is working on a fix.\n\n**See the [CHANGELOG](CHANGELOG.md) for details of all past releases and updates.**\n\n# Performance\n\nCUTLASS primitives are very efficient.  When used to construct device-wide GEMM kernels,\nthey exhibit nearly optimal utilization of peak theoretical throughput. The figure below\nshows CUTLASS 3.8's performance as a % of theoretical peak utilization \non various input and output data types when run on NVIDIA Blackwell SM100 architecture GPU.\n\n\u003cp align=\"center\"\u003e\u003cimg src=media/images/cutlass-3.8-blackwell-gemm-peak-performance.svg\u003e\u003c/p\u003e\n\nThe two figures below show the continual CUTLASS performance improvements \non an [NVIDIA H100](https://www.nvidia.com/en-us/data-center/h100/) (NVIDIA Hopper architecture) since\nCUTLASS 3.1.\nCUTLASS 3.5.1 was compiled with the [CUDA 12.5u1 Toolkit](https://developer.nvidia.com/cuda-downloads). \nTensor Core operations are implemented using CUDA's \n[mma](https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#warp-level-matrix-instructions-mma) and\n[wgmma](https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#asynchronous-warpgroup-level-matrix-instructions) instructions.\n\n\u003cp align=\"center\"\u003e\u003cimg src=media/images/cutlass-3.5.1-gemm-peak-performance.png\u003e\u003c/p\u003e\n\u003cp align=\"center\"\u003e\u003cimg src=media/images/cutlass-3.5.1-gemm-peak-performance-fp8.png\u003e\u003c/p\u003e\n\n# CuTe\n\nCUTLASS 3.0 introduced a new core library, CuTe, to describe and manipulate tensors of threads and data.\nCuTe is a collection of C++ CUDA template abstractions for\ndefining and operating on hierarchically multidimensional layouts of threads and data.\nCuTe provides `Layout` and `Tensor` objects that compactly package the type,\nshape, memory space, and layout of data, while performing the complicated indexing for the user.\nThis lets programmers focus on the logical descriptions of their algorithms while\nCuTe does the mechanical bookkeeping for them. With these tools, we can quickly design,\nimplement, and modify all dense linear algebra operations.\n\nThe core abstractions of CuTe are hierarchically multidimensional layouts\nwhich can be composed with data arrays to represent tensors.\nThe representation of layouts is powerful enough to represent nearly\neverything we need to implement efficient dense linear algebra.\nLayouts can also be combined and manipulated via functional composition, on which we build a large set of common operations such as tiling and partitioning.\n\nCUTLASS 3.0 and beyond adopts CuTe throughout the GEMM hierarchy in its templates.\nThis greatly simplifies the design and improves code composability and readability.\nMore documentation specific to CuTe can be found in its\n[dedicated documentation directory](./media/docs/cpp/cute/00_quickstart.md).\n\n# Compatibility\n\nMinimum requirements:\n\n- Architecture: Volta (compute capability 7.0)\n- Compiler: Must support at least C++17\n- CUDA Toolkit version: 11.4\n\nCUTLASS requires a C++17 host compiler and \nperforms best when built with the [**CUDA 12.8 Toolkit**](https://developer.nvidia.com/cuda-downloads).\nIt is also compatible with CUDA 11.4, CUDA 11.5, CUDA 11.6, CUDA 11.7, CUDA 11.8, and all other CUDA 12.x versions.\n\n## Operating Systems\n\nWe have tested the following environments.\n\n|**Operating System** | **Compiler** |\n|-----------------|----------|\n| Ubuntu 18.04 | GCC 7.5.0  |\n| Ubuntu 20.04 | GCC 10.3.0 |\n| Ubuntu 22.04 | GCC 11.2.0 |\n\nNote: GCC 8.5.0 has known regressions regarding fold expressions and overloaded operators. Using GCC 7.5.0 or (preferred) GCC \u003e= 9 is recommended.\n\nNote: CUTLASS 3.x builds are known to be down on Windows platforms for all CUDA toolkits.\nCUTLASS team is working on a fix.\n\n## Hardware\n\nCUTLASS runs successfully on the following NVIDIA GPUs, and it is expected to be efficient on Volta, Turing, Ampere, Ada, and Hopper architecture based NVIDIA GPUs.\n\n|**GPU**|**CUDA Compute Capability**|**Minimum CUDA Toolkit Required by CUTLASS-3**|\n|---|---|---|\n|NVIDIA V100 Tensor Core GPU            |7.0|11.4|\n|NVIDIA TitanV                          |7.0|11.4|\n|NVIDIA GeForce RTX 20x0 series         |7.5|11.4|\n|NVIDIA T4                              |7.5|11.4|\n|NVIDIA A100 Tensor Core GPU            |8.0|11.4|\n|NVIDIA A10                             |8.6|11.4|\n|NVIDIA GeForce RTX 30x0 series         |8.6|11.4|\n|NVIDIA GeForce RTX 40x0 series         |8.9|11.8|\n|NVIDIA L40                             |8.9|11.8|\n|NVIDIA H100 Tensor Core GPU            |9.0|11.8|\n|NVIDIA H200 Tensor Core GPU            |9.0|11.8|\n|NVIDIA B200 Tensor Core GPU            |10.0|12.8|\n|NVIDIA GeForce RTX 50x0 series         |10.0|12.8|\n\n## Target Architecture\n\nIn general, PTX code generated for one target architecture can be run on future architectures\n(i.e., it is forward compatible).\nHowever, CUDA 12.0 introduced the concept of \"architecture-accelerated features\" whose\nPTX does not have forward compatibility guarantees.\nSeveral Hopper and Blackwell PTX instructions fall under this category of\narchitecture-accelerated features, and thus require a `sm_90a` or `sm100a` target architecture\n(note the \"a\" appended). For more details on this and other architecture-accelerated instructions,\nplease refer to the [CUDA Documentation](https://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#feature-availability).\n\nThe target architecture information is passed on to CUTLASS via the cmake flag\n`CUTLASS_NVCC_ARCHS`. In order to maximize performance on Hopper GH100,\nusers are required to build CUTLASS with `90a` as the target architecture.\nIf a user accidentally builds a kernel which uses SM90a features\n(e.g. Hopper Tensor Core Instructions), using the SM90 target\n(note the lack of \"a\"), with either CUDA Toolkit 12 or 11.8,\nthe kernel is expected to fail with a runtime error.\n\n```\ncmake .. -DCUTLASS_NVCC_ARCHS=\"90a\"\n```\nOr \n\n```\ncmake .. -DCUTLASS_NVCC_ARCHS=\"100a\" \n```\n\nNote: The NVIDIA Blackwell SM100 architecture used in the datacenter \nproducts has a different compute capability than the one underpinning \nNVIDIA Blackwell GeForce RTX 50 series GPUs. As a result, kernels \ncompiled for Blackwell SM100 architecture with arch conditional features \n(using `sm100a`) are not compatible with RTX 50 series GPUs. \n\nPlease refer to the [functionality documentation](./media/docs/cpp/functionality.md)\nfor details on which kernels require which target architectures.\n\n# Documentation\n\nCUTLASS is described in the following documents and the accompanying\n[Doxygen documentation](https://nvidia.github.io/cutlass).\n\n- [Quick Start Guide](./media/docs/cpp/quickstart.md) - basics of building and running CUTLASS\n- [Functionality](./media/docs/cpp/functionality.md) - summarizes functionality available in CUTLASS\n- [Efficient GEMM in CUDA](./media/docs/cpp/efficient_gemm.md) - describes how GEMM kernels may be implemented efficiently in CUDA\n- [CUTLASS 3.x Design](./media/docs/cpp/cutlass_3x_design.md) - describes the CUTLASS 3.x design, its benefits, and how CuTe enables us to write much more composable components\n- [GEMM API 3.x](./media/docs/cpp/gemm_api_3x.md) - describes the CUTLASS 3.x GEMM model and C++ template concepts\n- [GEMM API 2.x](./media/docs/cpp/gemm_api.md) - describes the CUTLASS 2.x GEMM model and C++ template concepts\n- [Implicit GEMM Convolution](./media/docs/cpp/implicit_gemm_convolution.md) - describes 2-D and 3-D convolution in CUTLASS\n- [Code Organization](./media/docs/cpp/code_organization.md) - describes the organization and contents of the CUTLASS project\n- [Terminology](./media/docs/cpp/terminology.md) - describes terms used in the code\n- [Programming Guidelines](./media/docs/cpp/programming_guidelines.md) - guidelines for writing efficient modern CUDA C++\n- [Fundamental types](./media/docs/cpp/fundamental_types.md) - describes basic C++ classes used in CUTLASS to represent numeric quantities and arrays\n- [Layouts](./media/docs/cpp/layout.md) - describes layouts of matrices and tensors in memory\n- [Tile Iterators](./media/docs/cpp/tile_iterator_concept.md) - describes C++ concepts for iterating over tiles of matrices in memory\n- [CUTLASS Profiler](./media/docs/cpp/profiler.md) - command-line driven profiling application\n- [CUTLASS Utilities](./media/docs/cpp/utilities.md) - additional templates used to facilitate rapid development\n- [Dependent kernel launch](./media/docs/cpp/dependent_kernel_launch.md) - describes a new feature in Hopper which allows overlapping dependent \nkernels in the same stream, and how it is used in CUTLASS.\n\n# Resources\nWe have also described the structure of an efficient GEMM in our talk at the\n[GPU Technology Conference 2018](http://on-demand.gputechconf.com/gtc/2018/presentation/s8854-cutlass-software-primitives-for-dense-linear-algebra-at-all-levels-and-scales-within-cuda.pdf).\n\n- [CUTLASS: Software Primitives for Dense Linear Algebra at All Levels and Scales within CUDA](https://www.nvidia.com/en-us/on-demand/session/gtcsiliconvalley2018-s8854/)\n- [Developing CUDA Kernels to Push Tensor Cores to the Absolute Limit on NVIDIA A100](https://www.nvidia.com/en-us/on-demand/session/gtcsj20-s21745/)\n- [Accelerating Convolution with Tensor Cores in CUTLASS](https://www.nvidia.com/en-us/on-demand/session/gtcspring21-s31883/)\n- [Accelerating Backward Data Gradient by Increasing Tensor Core Utilization in CUTLASS](https://www.nvidia.com/en-us/on-demand/session/gtcspring22-s41996/)\n- [CUTLASS: Python API, Enhancements, and NVIDIA Hopper](https://www.nvidia.com/en-us/on-demand/session/gtcfall22-a41131/)\n\n# Building CUTLASS\n\nCUTLASS is a header-only template library and does not need to be built to be used by other\nprojects. Client applications should target CUTLASS's `include/` directory in their include\npaths.\n\nCUTLASS unit tests, examples, and utilities can be build with CMake.\nThe minimum version of CMake is given in the [Quickstart guide](./media/docs/cpp/quickstart.md).\nMake sure the `CUDACXX` environment  variable points to NVCC in the CUDA Toolkit installed\non your system.\n\n```bash\n$ export CUDACXX=${CUDA_INSTALL_PATH}/bin/nvcc\n```\n\nCreate a build directory within the CUTLASS project, then run CMake. By default CUTLASS will build kernels\nfor CUDA architecture versions 5.0, 6.0, 6.1, 7.0, 7.5, 8.0, 8.6, 8.9, and 9.0.\nTo reduce compile time you can specify\nthe architectures to build CUTLASS for by changing the CMake configuration setting\n`CUTLASS_NVCC_ARCHS`.\n\n```bash\n$ mkdir build \u0026\u0026 cd build\n\n$ cmake .. -DCUTLASS_NVCC_ARCHS=80               # compiles for NVIDIA's Ampere Architecture\n```\n\nFrom the `build/` directory, compile and run the CUTLASS unit tests by building the target `test_unit` with make.\n\nThe unit tests are organized as several binaries mirroring the top-level namespaces of CUTLASS,\nand they may be executed in parallel via make's `-j` command line argument.\n\n```bash\n$ make test_unit -j\n...\n...\n...\n[----------] Global test environment tear-down\n[==========] 946 tests from 57 test cases ran. (10812 ms total)\n[  PASSED  ] 946 tests.\n```\n\nAll tests should pass on supported platforms, though the exact number of tests may vary over time.\n\n\n# Project Structure\n\nCUTLASS is arranged as a header-only library along with Utilities, Tools, Examples, and unit tests. \n[Doxygen documentation](https://nvidia.github.io/cutlass) provides a complete list of files, classes, \nand template concepts defined in the CUTLASS project.\n\nA detailed explanation of the source code organization may be found in the \n[CUTLASS documentation](./media/docs/cpp/code_organization.md), but several main components are summarized below.\n\n## CUTLASS Template Library\n\n```\ninclude/                     # client applications should target this directory in their build's include paths\n\n  cutlass/                   # CUDA Templates for Linear Algebra Subroutines and Solvers - headers only\n\n    arch/                    # direct exposure of architecture features (including instruction-level GEMMs)\n\n    conv/                    # code specialized for convolution\n\n    epilogue/                # code specialized for the epilogue of gemm/convolution\n\n    gemm/                    # code specialized for general matrix product computations\n\n    layout/                  # layout definitions for matrices, tensors, and other mathematical objects in memory\n\n    platform/                # CUDA-capable Standard Library components\n\n    reduction/               # bandwidth-limited reduction kernels that do not fit the \"gemm\" model\n\n    thread/                  # simt code that can be performed within a CUDA thread\n    \n    transform/               # code specialized for layout, type, and domain transformations\n\n    *                        # core vocabulary types, containers, and basic numeric operations\n\n  cute/                      # CuTe Layout, layout algebra, MMA/Copy atoms, tiled MMA/Copy\n\n    algorithm/               # Definitions of core operations such as copy, gemm, and operations on cute::tuples\n\n    arch/                    # Bare bones PTX wrapper structs for copy and math instructions\n\n    atom/                    # Meta-information either link to or built from arch/ operators\n\n      mma_atom.hpp           # cute::Mma_Atom and cute::TiledMma\n\n      copy_atom.hpp          # cute::Copy_Atom and cute::TiledCopy\n\n      *sm*.hpp               # Arch specific meta-information for copy and math operations\n\n    *                        # Core library types such as Shape, Stride, Layout, Tensor, and associated operations\n\n```\n\n### CUTLASS SDK Examples\n\n[CUTLASS SDK examples](./examples) apply CUTLASS templates to implement basic computations.\n\n### Tools\n\n```\ntools/\n  library/                   # CUTLASS Instance Library - contains instantiations of all supported CUTLASS templates\n    include/\n      cutlass/\n        library/\n\n  profiler/                  # CUTLASS Profiler         - command-line utility for executing operations in the\n                             #                            CUTLASS Library\n  \n  util/                      # CUTLASS Utilities        - contains numerous helper classes for\n    include/                 #                            manging tensors in device memory, reference\n      cutlass/               #                            implementations for GEMM, random initialization\n        util/                #                            of tensors, and I/O.\n```\n\n### Test\n\nThe `test/unit/` directory consist of unit tests implemented with Google Test that demonstrate\nbasic usage of Core API components and complete tests of the CUTLASS GEMM computations.\n\nInstructions for building and running the Unit tests are described in the [Quickstart guide](./media/docs/cpp/quickstart.md).\n\n# Performance Profiling\n\nThe `tools/profiler/` directory contains a command-line utility for launching each of the GEMM kernels.\nIt can be built as follows:\n\n```bash\n$ make cutlass_profiler -j16\n```\n## Building all GEMM and Convolution kernels (_long_ build times)\n\nBy default, only one tile size is instantiated for each data type, math instruction, and layout.\nTo instantiate all, set the following environment variable when running CMake from an empty `build/` directory.\nBeware, this results in *tens of thousands* of kernels and long build times. \nThis would also result in a large binary size and on some platforms linker to fail on building the library.\nTherefore, it's highly recommended to generate only a subset of kernels as demonstrated in the sub-section below.\n```bash\n$ cmake .. -DCUTLASS_NVCC_ARCHS=90a -DCUTLASS_LIBRARY_KERNELS=all\n...\n$ make cutlass_profiler -j16\n```\n\n## Building a subset of GEMM and Convolution kernels (_reduced_ build times)\n\nTo compile strictly one kernel or a small set of kernels, a comma-delimited list of kernel names with \nwildcard characters may be used to reduce the set of kernels. The following examples show building exactly one\nor a subset of kernels for NVIDIA Ampere and Turing architecture:\n\n### Building a subset Tensor Core GEMM kernels\n\nTo compile a subset of Tensor Core GEMM kernels with FP32 accumulation and FP16 input targeting NVIDIA Ampere and Turing architecture, \nuse the below cmake command line:\n```bash\n$ cmake .. -DCUTLASS_NVCC_ARCHS='75;80' -DCUTLASS_LIBRARY_KERNELS=cutlass_tensorop_s*gemm_f16_*_nt_align8\n...\n$ make cutlass_profiler -j16\n```\n\nExample command line for profiling a subset of Tensor Core GEMM kernels is as follows:\n```bash\n./tools/profiler/cutlass_profiler --kernels=cutlass_tensorop_s*gemm_f16_*_nt_align8 --m=3456 --n=4096 --k=4096\n\n...\n=============================\n  Problem ID: 1\n\n        Provider: CUTLASS\n   OperationKind: gemm\n       Operation: cutlass_tensorop_s1688gemm_f16_256x128_32x2_nt_align8\n\n          Status: Success\n    Verification: ON\n     Disposition: Passed\n\nreference_device: Passed\n          cuBLAS: Passed\n\n       Arguments: --gemm_kind=universal --m=3456 --n=4096 --k=4096 --A=f16:column --B=f16:row --C=f32:column --alpha=1  \\\n                  --beta=0 --split_k_slices=1 --batch_count=1 --op_class=tensorop --accum=f32 --cta_m=256 --cta_n=128  \\\n                  --cta_k=32 --stages=2 --warps_m=4 --warps_n=2 --warps_k=1 --inst_m=16 --inst_n=8 --inst_k=8 --min_cc=75  \\\n                  --max_cc=1024\n\n           Bytes: 118489088  bytes\n           FLOPs: 115992428544  flops\n\n         Runtime: 1.55948  ms\n          Memory: 70.7616 GiB/s\n\n            Math: 74378.8 GFLOP/s\n\n\n\n=============================\n...\n```\n\n### Building one CUDA Core GEMM kernel\n\nTo compile one SGEMM kernel targeting NVIDIA Ampere and Turing architecture, use the below cmake command line:\n```bash\n$ cmake .. -DCUTLASS_NVCC_ARCHS='75;80' -DCUTLASS_LIBRARY_KERNELS=cutlass_simt_sgemm_128x128_8x2_nn_align1\n...\n$ make cutlass_profiler -j16\n```\n\nExample command line for profiling single SGEMM CUDA kernel is as follows:\n```bash\n$ ./tools/profiler/cutlass_profiler --kernels=sgemm --m=3456 --n=4096 --k=4096\n\n=============================\n  Problem ID: 1\n\n        Provider: CUTLASS\n   OperationKind: gemm\n       Operation: cutlass_simt_sgemm_128x128_8x2_nn_align1\n\n          Status: Success\n    Verification: ON\n     Disposition: Passed\n\n          cuBLAS: Passed\n\n       Arguments: --m=3456 --n=4096 --k=4096 --A=f32:column --B=f32:column --C=f32:column --alpha=1 --beta=0 --split_k_slices=1  \\\n                  --batch_count=1 --op_class=simt --accum=f32 --cta_m=128 --cta_n=128 --cta_k=8 --stages=2 --warps_m=4  \\\n                  --warps_n=2 --warps_k=1 --inst_m=1 --inst_n=1 --inst_k=1 --min_cc=50 --max_cc=1024\n\n           Bytes: 180355072  bytes\n           FLOPs: 115992428544  flops\n\n         Runtime: 6.73655  ms\n          Memory: 24.934 GiB/s\n\n            Math: 17218.4 GFLOP/s\n\n=============================\n```\n\n### Building a subset of Tensor Core Convolution kernels\n\nTo compile a subset of Tensor core convolution kernels implementing forward propagation (fprop) with FP32 accumulation \nand FP16 input targeting NVIDIA Ampere and Turing architecture, use the below cmake command line:\n```bash\n$ cmake .. -DCUTLASS_NVCC_ARCHS='75;80' -DCUTLASS_LIBRARY_KERNELS=cutlass_tensorop_s*fprop_optimized_f16\n...\n$ make cutlass_profiler -j16\n```\n\nExample command line for profiling a subset of Tensor Core convolution kernels is as follows:\n\n```bash\n$ ./tools/profiler/cutlass_profiler --kernels=cutlass_tensorop_s*fprop_optimized_f16 --n=8 --h=224 --w=224 --c=128 --k=128 --r=3 --s=3\n\n...\n=============================\n  Problem ID: 1\n\n        Provider: CUTLASS\n   OperationKind: conv2d\n       Operation: cutlass_tensorop_s16816fprop_optimized_f16_128x128_32x5_nhwc\n\n          Status: Success\n    Verification: ON\n     Disposition: Passed\n\nreference_device: Passed\n\n       Arguments: --conv_kind=fprop --n=8 --h=224 --w=224 --c=128 --k=128 --r=3 --s=3 --p=224 --q=224 --pad_h=1 --pad_w=1  \\\n                  --stride_h=1 --stride_w=1 --dilation_h=1 --dilation_w=1 --Activation=f16:nhwc --Filter=f16:nhwc --Output=f32:nhwc  \\\n                  --conv_mode=cross --iterator_algorithm=optimized --alpha=1 --beta=0 --split_k_mode=serial --split_k_slices=1  \\\n                  --eq_gemm_provider=none --op_class=tensorop --accum=f32 --cta_m=128 --cta_n=128 --cta_k=32 --stages=5  \\\n                  --warps_m=2 --warps_n=2 --warps_k=1 --inst_m=16 --inst_n=8 --inst_k=16 --min_cc=80 --max_cc=1024\n\n           Bytes: 1130659840  bytes\n           FLOPs: 118482796544  flops\n\n         Runtime: 0.711496  ms\n          Memory: 1479.99 GiB/s\n\n            Math: 166526 GFLOP/s\n\n=============================\n...\n```\n\n\n### Building one Convolution CUDA kernel\n\nTo compile and run one CUDA Core convolution kernel implementing forward propagation (fprop) with F32 accumulation \nand FP32 input targeting NVIDIA Ampere and Turing architecture, use the below cmake command line:\n```bash\n$ cmake .. -DCUTLASS_NVCC_ARCHS='75;80' -DCUTLASS_LIBRARY_KERNELS=cutlass_simt_sfprop_optimized_128x128_8x2_nhwc\n...\n$ make cutlass_profiler -j16\n```\n\nExample command line for profiling one CUDA Core convolution kernel:\n\n```bash\n$ ./tools/profiler/cutlass_profiler --kernels=cutlass_simt_sfprop_optimized_128x128_8x2_nhwc --n=8 --h=224 --w=224 --c=128 --k=128 --r=3 --s=3\n\n\n=============================\n  Problem ID: 1\n\n        Provider: CUTLASS\n   OperationKind: conv2d\n       Operation: cutlass_simt_sfprop_optimized_128x128_8x2_nhwc\n\n          Status: Success\n    Verification: ON\n     Disposition: Passed\n\nreference_device: Passed\n\n       Arguments: --conv_kind=fprop --n=8 --h=224 --w=224 --c=128 --k=128 --r=3 --s=3 --p=224 --q=224 --pad_h=1 --pad_w=1  \\\n                  --stride_h=1 --stride_w=1 --dilation_h=1 --dilation_w=1 --Activation=f32:nhwc --Filter=f32:nhwc --Output=f32:nhwc  \\\n                  --conv_mode=cross --iterator_algorithm=optimized --alpha=1 --beta=0 --split_k_mode=serial --split_k_slices=1  \\\n                  --eq_gemm_provider=none --op_class=simt --accum=f32 --cta_m=128 --cta_n=128 --cta_k=8 --stages=2 --warps_m=4  \\\n                  --warps_n=2 --warps_k=1 --inst_m=1 --inst_n=1 --inst_k=1 --min_cc=50 --max_cc=1024\n\n           Bytes: 2055798784  bytes\n           FLOPs: 118482796544  flops\n\n         Runtime: 7.34266  ms\n          Memory: 260.752 GiB/s\n\n            Math: 16136.2 GFLOP/s\n\n\n=============================\n\n```\n\n## More Details on Compiling CUTLASS Kernels and CUTLASS Profiler\n- Please follow the links for more CMake examples on selectively compiling CUTLASS kernels:\n  - [GEMM CMake Examples](./media/docs/cpp/quickstart.md#gemm-cmake-examples) \n  - [Implicit GEMM convolution CMake Examples](./media/docs/cpp/quickstart.md#convolution-cmake-examples)\n- [Further details about the CUTLASS Profiler are described here.](./media/docs/cpp/profiler.md)\n\n\n# About\n\nCUTLASS is released by NVIDIA Corporation as Open Source software under the \n[3-clause \"New\" BSD license](LICENSE.txt).\n\n# Contributors\n\nThe official list of CUTLASS developers and contributors is available here: [CONTRIBUTORS](CONTRIBUTORS.md).\n\n# Copyright\n\nCopyright (c) 2017 - 2025 NVIDIA CORPORATION \u0026 AFFILIATES. All rights reserved.\nSPDX-License-Identifier: BSD-3-Clause\n\n```\n  Redistribution and use in source and binary forms, with or without\n  modification, are permitted provided that the following conditions are met:\n\n  1. Redistributions of source code must retain the above copyright notice, this\n  list of conditions and the following disclaimer.\n\n  2. Redistributions in binary form must reproduce the above copyright notice,\n  this list of conditions and the following disclaimer in the documentation\n  and/or other materials provided with the distribution.\n\n  3. Neither the name of the copyright holder nor the names of its\n  contributors may be used to endorse or promote products derived from\n  this software without specific prior written permission.\n\n  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\n  DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE\n  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\n  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR\n  SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n  CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,\n  OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\n  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n```\n","funding_links":[],"categories":[],"sub_categories":[],"project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fnvidia%2Fcutlass","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fnvidia%2Fcutlass","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fnvidia%2Fcutlass/lists"}