{"id":31018767,"url":"https://github.com/oddball/embedpythoninverilogexample","last_synced_at":"2025-09-13T08:24:31.712Z","repository":{"id":1778349,"uuid":"2701101","full_name":"oddball/embedPythonInVerilogExample","owner":"oddball","description":"embedPythonInVerilogExample","archived":false,"fork":false,"pushed_at":"2017-03-23T22:33:56.000Z","size":2,"stargazers_count":10,"open_issues_count":0,"forks_count":4,"subscribers_count":4,"default_branch":"master","last_synced_at":"2023-03-12T09:07:27.553Z","etag":null,"topics":[],"latest_commit_sha":null,"homepage":"http://andreaslindh.wordpress.com/2011/11/03/embedpythoninverilogexample/","language":"Makefile","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":null,"status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/oddball.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":null,"code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null}},"created_at":"2011-11-03T09:41:27.000Z","updated_at":"2018-11-09T08:52:47.000Z","dependencies_parsed_at":"2022-07-21T11:29:08.685Z","dependency_job_id":null,"html_url":"https://github.com/oddball/embedPythonInVerilogExample","commit_stats":null,"previous_names":[],"tags_count":0,"template":null,"template_full_name":null,"purl":"pkg:github/oddball/embedPythonInVerilogExample","repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/oddball%2FembedPythonInVerilogExample","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/oddball%2FembedPythonInVerilogExample/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/oddball%2FembedPythonInVerilogExample/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/oddball%2FembedPythonInVerilogExample/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/oddball","download_url":"https://codeload.github.com/oddball/embedPythonInVerilogExample/tar.gz/refs/heads/master","sbom_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/oddball%2FembedPythonInVerilogExample/sbom","scorecard":null,"host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":274936679,"owners_count":25377040,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","status":"online","status_checked_at":"2025-09-13T02:00:10.085Z","response_time":70,"last_error":null,"robots_txt_status":"success","robots_txt_updated_at":"2025-07-24T06:49:26.215Z","robots_txt_url":"https://github.com/robots.txt","online":true,"can_crawl_api":true,"host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":[],"created_at":"2025-09-13T08:24:28.464Z","updated_at":"2025-09-13T08:24:31.660Z","avatar_url":"https://github.com/oddball.png","language":"Makefile","funding_links":[],"categories":[],"sub_categories":[],"readme":"Wanted to show how easy it is to use Python together with Verilog or VHDL. With just a few lines the Python interpreter can be embedded and call tasks or functions in SystemVerilog. I am using the proprietary simulator Questasim in this example.\n\nThe SystemVerilog code looks like this\n\n```v\n`timescale 1 ns/1 ns\nmodule top;\n      import \"DPI-C\" context task startPython();\n      export \"DPI-C\" task sv_write;\n \n   // Exported SV task.  Can be called by C,SV or Python using c_write\n   task sv_write(input int data,address);\n      begin\n     $display(\"sv_write(data = %d, address = %d)\",data,address);\n      end\n   endtask\n \n   initial\n     begin\n    startPython();\n    $display(\"DONE!!\");\n     end\n \nendmodule\n```\n\n\nThe C code looks like this\n\n```c\n#include\n#include \"vpi_user.h\"\n#include \"pythonEmbedded.h\"\n \nstatic PyObject * c_write(PyObject *self, PyObject *args) {\n  int address,data;\n  if(!PyArg_ParseTuple(args, \"ii\", \u0026data, \u0026address))\n    return NULL;\n  sv_write(address,data);\n  return Py_BuildValue(\"\");\n}\n \nstatic PyMethodDef EmbMethods[] = {\n  {\"c_write\",c_write, METH_VARARGS,\"c_write(data,address)\"},\n  {NULL, NULL, 0, NULL}\n};\n \nDPI_DLLESPEC\nint startPython(){\n    Py_Initialize();\n    Py_InitModule(\"emb\", EmbMethods);\n    PyRun_SimpleString(\"import emb\\n\"\n               \"emb.c_write(0,1)\\n\");\n    Py_Finalize();\n    return 0;\n}\n```\n\nEasiest way to try it out:\n\n```bash\ngit clone http://github.com/oddball/embedPythonInVerilogExample.git\ncd embedPythonInVerilogExample\nmake\n```\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Foddball%2Fembedpythoninverilogexample","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Foddball%2Fembedpythoninverilogexample","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Foddball%2Fembedpythoninverilogexample/lists"}