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ipxact2systemverilog ipxact2rst ipxact2md ipxact2vhdl ipxact2c\n\n[![CI](https://github.com/oddball/ipxact2systemverilog/actions/workflows/ci.yml/badge.svg)](https://github.com/oddball/ipxact2systemverilog/actions/workflows/ci.yml)\n\n[![image](https://badge.fury.io/py/ipxact2systemverilog.svg)](https://pypi.python.org/pypi/ipxact2systemverilog/)\n\nThis software takes an IP-XACT description of register banks, and\ngenerates synthesizable VHDL and SystemVerilog packages and\nReStructuredText documents. It ONLY considers register bank\ndescriptions. The software does not generate OVM or UVM test bench\npackages. In the example/tb directory there is an example of how to use\nthe generated packages.\n\n## Usage\n\n```bash\npip install ipxact2systemverilog\n\nipxact2systemverilog --srcFile FILE --destDir DIR\nipxact2rst --srcFile FILE --destDir DIR\nipxact2md --srcFile FILE --destDir DIR\nipxact2vhdl --srcFile FILE --destDir DIR\nipxact2c --srcFile FILE --destDir DIR\n```\n\n## Development\n\nSee https://github.com/oddball/ipxact2systemverilog\n\n```bash\npython -m venv venv\nsource venv/bin/activate\npip install build\npython -m build\npython -m pip install .\n# In order to publish:\npip install twine\ntwine upload dist/*\n```\n\n## Testing the example file\n\n```bash\nmake\n```\n\nIf Modelsim is installed: :\n\n```bash\nmake compile\nmake sim\n```\n\n## Note\n\nYou can use \u003chttp://pandoc.org/demos.html\u003e to convert to almost any\nfileformat.\n\n## Validation\n\nTo validate your xml :\n\n```bash\nxmllint --noout --schema ipxact2systemverilog/xml/component.xsd  example/input/test.xml\n```\n\n## Dependencies\n\n```bash\npip install docutils lxml mdutils\n```\n\n## Dependencies used by makefile\n\nThese are not needed for ipxact2systemverilog, but used for generating\nsome of the files in example/output. Instructions are for MacOsX, similiar packages are\navailable for Linux and Windows.\n\n```bash\nbrew install pandoc\n\n# if you want to use sphinx\nbrew install texlive\nsudo tlmgr install latexmk\n```\n\n## TODO\n\n- A better test bench for the generated packages should be implemented.\n- More complicated IPXACT files should be added and tried out.\n- Add support for the SystemVerilog generator to have a register field\n  of an enumerated type.\n- Support DIM\n- Eat some cheese and drink some wine 2024-06-20\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Foddball%2Fipxact2systemverilog","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Foddball%2Fipxact2systemverilog","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Foddball%2Fipxact2systemverilog/lists"}