{"id":17662428,"url":"https://github.com/onkolahmet/cachelab","last_synced_at":"2025-03-30T11:27:55.534Z","repository":{"id":115719963,"uuid":"279083356","full_name":"onkolahmet/Cachelab","owner":"onkolahmet","description":"simulating hit/miss behavior of cache memory","archived":false,"fork":false,"pushed_at":"2020-10-23T22:03:49.000Z","size":653,"stargazers_count":0,"open_issues_count":0,"forks_count":0,"subscribers_count":2,"default_branch":"master","last_synced_at":"2025-02-05T13:24:46.215Z","etag":null,"topics":["cache-simulator"],"latest_commit_sha":null,"homepage":"","language":"Java","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":null,"status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/onkolahmet.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":null,"code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null}},"created_at":"2020-07-12T14:38:52.000Z","updated_at":"2021-08-28T21:29:01.000Z","dependencies_parsed_at":null,"dependency_job_id":"fc9aab18-0c4a-410f-93de-f501227edc02","html_url":"https://github.com/onkolahmet/Cachelab","commit_stats":null,"previous_names":[],"tags_count":0,"template":false,"template_full_name":null,"repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/onkolahmet%2FCachelab","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/onkolahmet%2FCachelab/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/onkolahmet%2FCachelab/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/onkolahmet%2FCachelab/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/onkolahmet","download_url":"https://codeload.github.com/onkolahmet/Cachelab/tar.gz/refs/heads/master","host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":246311682,"owners_count":20757179,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["cache-simulator"],"created_at":"2024-10-23T18:22:27.367Z","updated_at":"2025-03-30T11:27:55.504Z","avatar_url":"https://github.com/onkolahmet.png","language":"Java","funding_links":[],"categories":[],"sub_categories":[],"readme":"# Cachelab\nIt's a basic cache simulator which takes an image of memory and a memory trace as input, simulates\nthe hit/miss behavior of a cache memory on this trace, and outputs the total number of hits, misses, and evictions for each\ncache type along with the content of each cache at the end.\n## Reference Trace Files\nThe traces subdirectory of the handout directory contains a collection of reference trace files that we will use to\nevaluate the correctness of the cache simulator you write. The memory trace files have the following form: \u003cbr /\u003e \u003cbr /\u003e\nM 000ebe20, 3, 58a35a \u003cbr /\u003e\nL 000eaa30, 6 \u003cbr /\u003e\nS 0003b020, 7, abb2cdc69bb454 \u003cbr /\u003e\nI 00002010, 6 \u003cbr /\u003e\n\n\nEach line denotes one or two memory accesses. The format of each line for I and L:\u003cbr /\u003e\n    operation address, size.\u003cbr /\u003e\u003cbr /\u003e\nThe format of each line for M and S:\u003cbr /\u003e\n    operation address, size, data.\u003cbr /\u003e\u003cbr /\u003e\nThe operation field denotes the type of memory access:\n- “I” denotes an instruction load,\n- “L” a data load,\u003cbr /\u003e\n- “S” a data store, and\u003cbr /\u003e\n- “M” a data modify (i.e., a data load followed by a data store). \u003cbr /\u003e\n \n The address field specifies a 32-bit hexadecimal memory address.\u003cbr /\u003e \u003cbr /\u003e\n The size field specifies the number of bytes accessed by the operation.\u003cbr /\u003e \u003cbr /\u003e\n The data field specifies the data bytes stored in the given address.\u003cbr /\u003e \u003cbr /\u003e\n## Example Run\n\n![cachelab pdf](https://user-images.githubusercontent.com/62245004/97057487-ff262d80-1593-11eb-8534-0f5a04efbb1f.png)\n\n## Hit/Miss Behavior of a Cache Memory\n\n![cachela21b pdf](https://user-images.githubusercontent.com/62245004/97057786-ad31d780-1594-11eb-9f85-30e929a814a2.png)\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fonkolahmet%2Fcachelab","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fonkolahmet%2Fcachelab","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fonkolahmet%2Fcachelab/lists"}