{"id":13646944,"url":"https://github.com/openvizsla/ov_ftdi","last_synced_at":"2025-12-17T14:23:00.259Z","repository":{"id":8906599,"uuid":"10630505","full_name":"openvizsla/ov_ftdi","owner":"openvizsla","description":"FT2232H-based USB sniffer","archived":false,"fork":false,"pushed_at":"2023-01-09T21:40:33.000Z","size":39985,"stargazers_count":353,"open_issues_count":18,"forks_count":103,"subscribers_count":50,"default_branch":"master","last_synced_at":"2025-04-21T21:39:03.254Z","etag":null,"topics":[],"latest_commit_sha":null,"homepage":"","language":"HTML","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":null,"status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/openvizsla.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":null,"code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null}},"created_at":"2013-06-11T20:41:35.000Z","updated_at":"2025-03-27T18:07:48.000Z","dependencies_parsed_at":"2023-01-11T20:11:31.991Z","dependency_job_id":null,"html_url":"https://github.com/openvizsla/ov_ftdi","commit_stats":null,"previous_names":[],"tags_count":4,"template":false,"template_full_name":null,"purl":"pkg:github/openvizsla/ov_ftdi","repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/openvizsla%2Fov_ftdi","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/openvizsla%2Fov_ftdi/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/openvizsla%2Fov_ftdi/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/openvizsla%2Fov_ftdi/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/openvizsla","download_url":"https://codeload.github.com/openvizsla/ov_ftdi/tar.gz/refs/heads/master","sbom_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/openvizsla%2Fov_ftdi/sbom","scorecard":null,"host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":286080680,"owners_count":27783730,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","status":"online","status_checked_at":"2025-12-17T02:00:08.291Z","response_time":55,"last_error":null,"robots_txt_status":"success","robots_txt_updated_at":"2025-07-24T06:49:26.215Z","robots_txt_url":"https://github.com/robots.txt","online":true,"can_crawl_api":true,"host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":[],"created_at":"2024-08-02T01:03:16.198Z","updated_at":"2025-12-17T14:23:00.242Z","avatar_url":"https://github.com/openvizsla.png","language":"HTML","funding_links":[],"categories":["HTML","\u003ca id=\"7bf0f5839fb2827fdc1b93ae6ac7f53d\"\u003e\u003c/a\u003e工具"],"sub_categories":["\u003ca id=\"32739127f0c38d61b14448c66a797098\"\u003e\u003c/a\u003e嗅探\u0026\u0026Sniff"],"readme":"ov_ftdi\n=======\n\nThis is the main repository of the (FTDI-based) OpenVizsla 3.x USB protocol tracer.\n\nThe repository contains\n\n* **hardware** contains the hardware design files (Altium design files, Schematics, PCB layout)\n* **software/fpga** contains the source code to the digital logic inside the on-board FPGA\n* **software/host** contains the source code to the libusb-based host software\n\nGetting Started\n===============\n\nOnce you have [obtained hardware](#obtaining-hardware), you can build the software and set up udev rules as follows:\n\n```\ngit clone https://github.com/openvizsla/ov_ftdi\ncd ov_ftdi\nsudo cp software/host/52-openvizsla.rules /etc/udev/rules.d/\nmake -C software/host\n```\n\nIf the board was plugged in before copying the udev rules, either unplug it and plug it back, or run `sudo udevadm trigger -s usb -c add`.\n\nTo capture USB traffic, you need to know the speed beforehand; it is specified as one of `ls`, `fs` or `hs`. Sniff the traffic and print it to standard output with:\n\n```\n./software/host/ovctl.py sniff \u003cspeed\u003e\n```\n\nProject Status\n==============\n\n(as of October 2019):\n\nThe hardware design and the FPGA *gateware* are considered stable and reliable,\nand have not been touched since late 2014.\n\nThe host software is quite basic and just gives you a textual / hex decode of the\nUSB packets in near real-time. Alternatively the host software can save captures in following formats:\n  * ITI1480A that can be visualized with https://github.com/lambdaconcept/usb2sniffer-qt\n  * pcap (linktype 288) that can be visualized with Wireshark 3.2.0 or newer\n\nThere is basic integration with Wireshark using the extcap interface. The ovextcap available at https://github.com/matwey/libopenvizsla is known to work on Windows and Linux.\n\nThere is no code to aggregate packets into transfers. Future Wireshark versions will reassemble packets into transfers and pass the data to upper layer dissectors (HID, Audio, Mass Storage, CCID, DFU, etc.). The Wireshark dissector progress is tracked at https://bugs.wireshark.org/bugzilla/show_bug.cgi?id=15908\n\nThere's **no integration with other tools** like [sigrok](https://sigrok.org/) or the [virtual-usb-analyzer](http://vusb-analyzer.sourceforge.net/). Integration with sigrok would be nice to show the packet level of USB.\n\nAt least partly due to the lack of availability of boards, there hasn't been any\nprogress over the years, particularly not with the original project founder bushing\npassing away (see History section below).\n\nWe're looking forward to people who'd like to contribute in the area of the host\nsoftware.\n\nProject History\n===============\n\nThere was a [Kickstarter\ncampaign](https://www.kickstarter.com/projects/bushing/openvizsla-open-source-usb-protocol-analyzer) in 2010.  The campaign was hugely successful and interested parties\npledged more than USD 80k towards the development and fist production\nbatches of the project.  Development happened in 2011 and 2012 on a XMOS\nbased hardware design (OV2).\n\nUnfortuntely, progress was not as fast as originally anticipated for\na variety of reasons.\n\nBy June 2013, bushing decided to go ahead with a much simpler design\nbased on just a FTDI and FPGA, without the complexity of the XMOS.  This\nis what came to be known as OpenVizsla 3 or OV3.  In September 2013,\nthe digital logic migrated from Verilog to migen (python).\n\nYou can find some blog posts by Felix \"tmbinc\" Dombke related to the\ntime OV3 was under development at https://debugmo.de/tags/openvizsla/\n\nIn July/August 2014, all the backers finally received their boards.\n\nIn early 2016, the original creator of OpenVizsla, Ben \"bushing\" Byer\nhad unfortunately passed away.  One of the (lesser) consequences of this\nwas that pre-built/assembled OpenVizsla 3.x boards became unavailable.\n\nAs an Open Hardware project, of course anyone could simple build them,\nbut then if you just need one or a few boards, it's a lot of effort and\nnot very cost efficient to do so.\n\nIn 2018, Harald \"LaF0rge\" Welte became interested in the project, and\nwith the help of Felix \"tmbinc\" Domke, he managed to get hold of the\nleft-over surplus boards that still existed from bushings' original\nproduction run.  By early 2019 those boards arrived in Germany, from\nwhere they are now being made available via the sysmocom webshop\nat https://shop.sysmocom.de/\n\nHopefully with boards being available again, we can re-spawn some\ninterest into OpenVizsla, and get some people to work on improving\nit, particularly on the host software side for visualization of the\ncaptured data.\n\n\nCopyright / License\n===================\n\nOpenVizsla was originally created by Ben \"bushing\" Byer and pytey, and\nlater joined by Felix \"tmbinc\" Domke.  For detailed copyright statements,\nplease see the respective documents or code.\n\nThe License for the hardware design is the \"Creative Commons\nAttribution-ShareAlike 3.0 Unported License\"\n\nThe License for the hardware design is a 2-clause BSD-style license, see\n*software/fpga/ov3/LICENSE* for details\n\nThe License for the host software is a 2-clause BSD-style license, see\n*software/host/LICENSE* for details\n\n\nObtaining Hardware\n==================\n\nThe OpenVizsla 3.2 hardware is finally again available for purchase. This\nmeans you don't have to build your own boards to work with the project.\n\nYou can obtain boards from:\n* sysmocom, see https://shop.sysmocom.de/\n* 3mdeb, visit https://shop.3mdeb.com/\n\nPlease note that it is in no way required to buy the boards from mentioned\nshops, the design is open hardware and you can just as well build it all by\nyourself.\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fopenvizsla%2Fov_ftdi","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fopenvizsla%2Fov_ftdi","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fopenvizsla%2Fov_ftdi/lists"}