{"id":33755845,"url":"https://github.com/portal-co/asm-arch","last_synced_at":"2026-05-27T21:31:59.657Z","repository":{"id":320412025,"uuid":"1081091704","full_name":"portal-co/asm-arch","owner":"portal-co","description":"Assembly target types and data structures","archived":false,"fork":false,"pushed_at":"2026-05-14T21:44:19.000Z","size":391,"stargazers_count":0,"open_issues_count":0,"forks_count":0,"subscribers_count":0,"default_branch":"main","last_synced_at":"2026-05-14T23:36:46.312Z","etag":null,"topics":["aarch64","amd64","armv6","armv7","armv8","assembly","compiler","riscv","rv32","rv32g","rv32i","rv32im","rv64","rv64g","rv64i","rv64im","x64","x86","x86-64"],"latest_commit_sha":null,"homepage":"","language":"Rust","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":null,"status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/portal-co.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":null,"code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null,"zenodo":null,"notice":null,"maintainers":null,"copyright":null,"agents":null,"dco":null,"cla":null}},"created_at":"2025-10-22T09:50:26.000Z","updated_at":"2026-05-14T21:44:23.000Z","dependencies_parsed_at":"2025-10-23T17:42:31.394Z","dependency_job_id":null,"html_url":"https://github.com/portal-co/asm-arch","commit_stats":null,"previous_names":["portal-co/asm-arch"],"tags_count":0,"template":false,"template_full_name":null,"purl":"pkg:github/portal-co/asm-arch","repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/portal-co%2Fasm-arch","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/portal-co%2Fasm-arch/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/portal-co%2Fasm-arch/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/portal-co%2Fasm-arch/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/portal-co","download_url":"https://codeload.github.com/portal-co/asm-arch/tar.gz/refs/heads/main","sbom_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/portal-co%2Fasm-arch/sbom","scorecard":null,"host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":286080680,"owners_count":33585203,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2026-05-26T15:22:16.424Z","status":"online","status_checked_at":"2026-05-27T02:00:06.184Z","response_time":53,"last_error":null,"robots_txt_status":"success","robots_txt_updated_at":"2025-07-24T06:49:26.215Z","robots_txt_url":"https://github.com/robots.txt","online":true,"can_crawl_api":true,"host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["aarch64","amd64","armv6","armv7","armv8","assembly","compiler","riscv","rv32","rv32g","rv32i","rv32im","rv64","rv64g","rv64i","rv64im","x64","x86","x86-64"],"created_at":"2025-12-05T08:03:07.299Z","updated_at":"2026-05-27T21:31:59.651Z","avatar_url":"https://github.com/portal-co.png","language":"Rust","funding_links":[],"categories":[],"sub_categories":[],"readme":"# asm-arch\n\nAssembly target types and data structures for code generation and manipulation.\n\n## Overview\n\nThis workspace provides a collection of crates for working with assembly-level representations and code generation, primarily focused on x86-64 architecture support with extensible semantics and register allocation utilities.\n\n## Crates\n\nNote: The RISC-V crate `portal-solutions-asm-riscv64` includes a robust desugaring wrapper to\nhandle complex memory addressing and operand materialization. See `crates/asm-riscv64/src/desugar.rs` for details.\n\nChangelog (desugaring improvements):\n\n- Hardened temp selection with optional stack-spill behavior when temps conflict.\n- Preserves memory access `MemorySize` and `RegisterClass` across materializations.\n- Properly folds large displacements into base registers and avoids mem→mem clobbers.\n- Added comprehensive unit tests covering scale factors, large displacements, temp conflicts, and mem→mem cases.\n\n\n\n### portal-solutions-asm-x86-64\n\nCore x86-64 assembly types and output generation.\n\n- **Architecture configuration** (`X64Arch`): Configure x86-64 features like APX (Advanced Performance Extensions)\n- **Register handling** (`reg`): Register formatting and display with support for different sizes (8/16/32/64-bit)\n- **Condition codes** (`ConditionCode`): x86-64 condition codes for conditional instructions\n- **Instruction output** (`out`): Traits and implementations for generating assembly output\n  - `WriterCore`: Core trait for emitting individual instructions\n  - `Writer`: Extended trait with label support\n  - Argument types (`arg`): Memory and register operand representations\n\n### portal-solutions-asm-aarch64\n\nAArch64 (ARM64) assembly types and output generation, with x86-64 translation support.\n\n- **Architecture configuration** (`AArch64Arch`): AArch64-specific configuration\n- **Register handling** (`reg`): Support for 31 GPRs (X0-X30) plus SP, and 32 SIMD registers (V0-V31)\n- **Condition codes** (`ConditionCode`): Complete AArch64 condition code set\n- **Instruction output** (`out`): Full instruction generation similar to x86-64\n- **x64_shim** (optional): Translation guide for mapping x86-64 instructions to AArch64\n  - Condition code translation\n  - Instruction mapping documentation\n  - Performance notes for complex translations\n\n### portal-solutions-asm-semantics\n\nSemantic representation of assembly operations.\n\n- **Argument kinds** (`ArgKind`, `MemArgKind`): Represent fixed registers, slots, previous values, and literals\n- **Semantic trees** (`Semantic`, `PredicateTree`): Represent conditional and computed values\n- **Value operations** (`Val`): Binary operations, jumps, dereferences, and control flow\n\n### portal-solutions-asm-regalloc\n\nRegister allocation utilities for stack-based virtual machines.\n\n- **Register allocation** (`RegAlloc`): Manage register assignments with stack spilling\n- **Frame tracking** (`RegAllocFrame`): Track register states (reserved, empty, stack, local)\n- **Commands** (`Cmd`): Push, pop, and local variable operations\n\n## Features\n\nAll crates support `no_std` environments. Enable the `alloc` feature for heap allocation support:\n\n```toml\n[dependencies]\nportal-solutions-asm-x86-64 = { version = \"0.1.0\", features = [\"alloc\"] }\nportal-solutions-asm-aarch64 = { version = \"0.1.0\", features = [\"alloc\", \"x64_shim\"] }\n```\n\n### Feature Flags\n\n- **`alloc`**: Enable heap allocation support (available in all crates)\n- **`x64_shim`** (aarch64 only): Enable x86-64 to AArch64 translation utilities\n\n## License\n\nMPL-2.0\n\n## Goals\n- [ ] Maintain and expand architecture support (x86-64, AArch64, RISC-V, JVM)\n- [ ] Optimize register allocation algorithms\n- [ ] Ensure semantic consistency across architectures\n\n## Progress\n- [ ] Implemented core support for x86-64 and AArch64\n- [ ] Added register allocation and semantic modeling crates\n- [ ] RISC-V desugaring improvements (hardened temp selection, large displacement folding)\n\n---\n*AI assisted*\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fportal-co%2Fasm-arch","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fportal-co%2Fasm-arch","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fportal-co%2Fasm-arch/lists"}