{"id":17449169,"url":"https://github.com/ps2/subg_rfspy_circleci","last_synced_at":"2025-03-28T04:20:48.204Z","repository":{"id":66981472,"uuid":"137608638","full_name":"ps2/subg_rfspy_circleci","owner":"ps2","description":null,"archived":false,"fork":false,"pushed_at":"2018-06-16T20:37:09.000Z","size":182,"stargazers_count":0,"open_issues_count":0,"forks_count":0,"subscribers_count":1,"default_branch":"master","last_synced_at":"2025-02-02T05:25:26.475Z","etag":null,"topics":[],"latest_commit_sha":null,"homepage":null,"language":"C","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"mit","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/ps2.png","metadata":{"files":{"readme":"Readme.md","changelog":null,"contributing":null,"funding":null,"license":"LICENSE","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null}},"created_at":"2018-06-16T20:32:01.000Z","updated_at":"2018-06-16T20:37:10.000Z","dependencies_parsed_at":null,"dependency_job_id":"f05fc9dd-bc96-430f-986e-465a247c78f2","html_url":"https://github.com/ps2/subg_rfspy_circleci","commit_stats":null,"previous_names":[],"tags_count":0,"template":false,"template_full_name":null,"repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/ps2%2Fsubg_rfspy_circleci","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/ps2%2Fsubg_rfspy_circleci/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/ps2%2Fsubg_rfspy_circleci/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/ps2%2Fsubg_rfspy_circleci/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/ps2","download_url":"https://codeload.github.com/ps2/subg_rfspy_circleci/tar.gz/refs/heads/master","host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":245967427,"owners_count":20701839,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":[],"created_at":"2024-10-17T21:05:21.174Z","updated_at":"2025-03-28T04:20:48.182Z","avatar_url":"https://github.com/ps2.png","language":"C","funding_links":[],"categories":[],"sub_categories":[],"readme":"# subg_rfspy\n\n## Pre-Requisites for Building subg_rfspy\n\n[sdcc] (http://sdcc.sourceforge.net/) package is required for this build.\n\n    sudo apt-get install sdcc\n\nIt's also possible to build it under Windows. The best way to do this is to:\n\n1. install SDCC\n2. install Cygwin\n3. use Cygwin to install make\n4. Use cygwin bash to build the project\n\n# Building\n\nYou'll need to select a build type, like `spi1_alt2`.  The examples below use this value, but you'll want to use the correct one for your hardware and use case.  See below for different hardware types and use cases.\n\nPerform the build. The output file will be stored at output/uart0_alt1_RILEYLINK_US/uart0_alt1_RILEYLINK_US.hex\n\n    make -f Makefile.spi1_alt2\n\nPerform the install:\n\n    make -f Makefile.spi1_alt2 install\n\n# Radio Frequency Selection\n\nThis code defaults to building firmware that is tuned to 916.5 Mhz. You can also build a 'WorldWide' firmware. This changes the default frequency to 868 and tweaks a few other settings.\n\n    make -f Makefile.spi1_alt2 RADIO_LOCALE=WW\n\n# RileyLink\n\nIf you are using a [RileyLink](https://github.com/ps2/rileylink) via the onboard bluetooth module (which should be loaded with ble_rfspy), then you'll want to use `spi1_alt2` as your build type.\n\n# Protocol\n\nSee [protocol.md](protocol.md)\n\n\n# Addendum\n\n## Serial/Uart Support\n\nSerial support is no longer supported.  See [serial.md](serial.md) for\nhistorical information.\n\n## Frequency Channel Selection\n\nEach channel number corresponds to a different specific frequency. Channels start with 916.5 MHz at\nChannel 0 and end with 934.4 MHz at Channel 255, in steps of about 0.07 MHz. You can select different\nchannels by adjusting the CHANNR.CHAN register. Available channels are governed by the following equation:\n\n`f_carrier = (24MHz/(2^16))*(FREQ + CHAN(256 + CHANSPC_M)*2^(CHANSPC_E - 2))`\n\nThe base frequency, FREQ, is set by the FREQ2, FREQ1, and FREQ0 registers. The value default value is\n2502768 (0x263070).  \nCHANSPC_M and CHANSPC_E are used to set the channel spacing, and are contained in the registers MDMCFG0\nand MDMCFG1 (bits 1:0), respectively. Their default values are 126 (0x7E) and 1.\n\n## Supported Registers\n\n### SYNC1 (0x00)\n\nSync Word, High Byte. 8 MSB of 16-bit sync word.\n\n### SYNC0 (0x01)\n\nSync Word, Low Byte. 8 LSB of 16-bit sync word.\n\n### PKTLEN (0x02)\n\nPacket Length. Indicates the packet length when fixed length packets are enabled. If\nvariable length packets are used, this value indicates the maximum length\npackets allowed.\n\n### PKTCTRL1 (0x03)\n\nPacket Automation Control. Different bit ranges have different functions.\nSee CC1110/CC1111 datasheet for more information.\n\n### PKTCTRL0 (0x04)\n\nPacket Automation Control. Different bit ranges have different functions.\nSee CC1110/CC1111 datasheet for more information.\n\n### ADDR (0x05)\n\nDevice Address. Address used for packet filtration. Optional broadcast addresses are 0\n(0x00) and 255 (0xFF).\n\n### CHANNR (0x06)\n\nChannel Number. The 8-bit unsigned channel number, which is multiplied by the channel\nspacing setting and added to the base frequency.\n\n### FSCTRL1 (0x07)\n\nFrequency Synthesizer Control.\n\n### FSCTRL0 (0x08)\n\nFrequency Synthesizer Control. Frequency offset added to the base frequency before being used by the\nFS.\n\n### FREQ2 (0x09)\n\nFrequency Control Word, High Byte.\n\n### FREQ1 (0x0A)\n\nFrequency Control Word, Middle Byte.\n\n### FREQ0 (0x0B)\n\nFrequency Control Word, Low Byte.\n\n### MDMCFG4 (0x0C)\n\nModem Configuration. Different bit ranges have different functions.\nSee CC1110/CC1111 datasheet for more information.\n\n### MDMCFG3 (0x0D)\n\nModem Configuration. Different bit ranges have different functions.\nSee CC1110/CC1111 datasheet for more information.\n\n### MDMCFG2 (0x0E)\n\nModem Configuration. Different bit ranges have different functions.\nSee CC1110/CC1111 datasheet for more information.\n\n### MDMCFG1 (0x0F)\n\nModem Configuration. Different bit ranges have different functions.\nSee CC1110/CC1111 datasheet for more information.\n\n### MDMCFG0 (0x10)\n\nModem Configuration. Different bit ranges have different functions.\nSee CC1110/CC1111 datasheet for more information.\n\n### DEVIATN (0x11)\n\nModem Deviation Setting. Different bit ranges have different functions.\nSee CC1110/CC1111 datasheet for more information.\n\n### MCSM2 (0x12)\n\nMain Radio Control State Machine Configuration. Different bit ranges have\ndifferent functions. See CC1110/CC1111 datasheet for more information.\n\n### MCSM1 (0x13)\n\nMain Radio Control State Machine Configuration. Different bit ranges have\ndifferent functions. See CC1110/CC1111 datasheet for more information.\n\n### MCSM0 (0x14)\n\nMain Radio Control State Machine Configuration. Different bit ranges have\ndifferent functions. See CC1110/CC1111 datasheet for more information.\n\n### FOCCFG (0x15)\n\nFrequency Offset Compensation Configuration. Different bit ranges have\ndifferent functions. See CC1110/CC1111 datasheet for more information.\n\n### BSCFG (0x16)\n\nBit Synchronization Configuration. Different bit ranges have different\nfunctions. See CC1110/CC1111 datasheet for more information.\n\n### AGCCTRL2 (0x17)\n\nAGC Control. Different bit ranges have different functions.\nSee CC1110/CC1111 datasheet for more information.\n\n### AGCCTRL1 (0x18)\n\nAGC Control. Different bit ranges have different functions.\nSee CC1110/CC1111 datasheet for more information.\n\n### AGCCTRL0 (0x19)\n\nAGC Control. Different bit ranges have different functions.\nSee CC1110/CC1111 datasheet for more information.\n\n### FREND1 (0x1A)\n\nFront End RX Configuration. Different bit ranges have different\nfunctions. See CC1110/CC1111 datasheet for more information.\n\n### FREND0 (0x1B)\n\nFront End RX Configuration. Different bit ranges have different\nfunctions. See CC1110/CC1111 datasheet for more information.\n\n### FSCAL3 (0x1C)\n\nFrequency Synthesizer Calibration. Different bit ranges have\ndifferent functions. See CC1110/CC1111 datasheet for more information.\n\n### FSCAL2 (0x1D)\n\nFrequency Synthesizer Calibration. Different bit ranges have different\nfunctions. See CC1110/CC1111 datasheet for more information.\n\n### FSCAL1 (0x1E)\n\nFrequency Synthesizer Calibration. Different bit ranges have different\nfunctions. See CC1110/CC1111 datasheet for more information.\n\n### FSCAL0 (0x1F)\n\nFrequency Synthesizer Calibration. Different bit ranges have different\nfunctions. See CC1110/CC1111 datasheet for more information.\n\n### PA_TABLE1 (0x2D)\n\nPower amplifier output power setting 1.\n\n### PA_TABLE0 (0x2E)\n\nPower amplifier output power setting 0.\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fps2%2Fsubg_rfspy_circleci","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fps2%2Fsubg_rfspy_circleci","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fps2%2Fsubg_rfspy_circleci/lists"}