{"id":20610882,"url":"https://github.com/psmths/riscal-cpu","last_synced_at":"2026-04-15T23:32:15.004Z","repository":{"id":46048895,"uuid":"428372741","full_name":"Psmths/riscal-cpu","owner":"Psmths","description":"RISCAL is a 32-bit reduced instruction-set computer (RISC) designed for learning and research purposes. It is named after my dog, Rascal.","archived":false,"fork":false,"pushed_at":"2021-12-23T14:58:15.000Z","size":267,"stargazers_count":3,"open_issues_count":0,"forks_count":0,"subscribers_count":1,"default_branch":"main","last_synced_at":"2025-10-15T00:43:25.326Z","etag":null,"topics":["assembler","assembly","instruction-set-architecture","machine-code","obfuscation","risc","virtual-machine","virtualization"],"latest_commit_sha":null,"homepage":"","language":"C++","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"gpl-3.0","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/Psmths.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":"LICENSE","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null}},"created_at":"2021-11-15T18:12:41.000Z","updated_at":"2021-12-23T14:58:18.000Z","dependencies_parsed_at":"2022-09-23T07:10:35.733Z","dependency_job_id":null,"html_url":"https://github.com/Psmths/riscal-cpu","commit_stats":null,"previous_names":[],"tags_count":1,"template":false,"template_full_name":null,"purl":"pkg:github/Psmths/riscal-cpu","repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/Psmths%2Friscal-cpu","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/Psmths%2Friscal-cpu/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/Psmths%2Friscal-cpu/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/Psmths%2Friscal-cpu/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/Psmths","download_url":"https://codeload.github.com/Psmths/riscal-cpu/tar.gz/refs/heads/main","sbom_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/Psmths%2Friscal-cpu/sbom","scorecard":null,"host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":286080680,"owners_count":31865026,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2026-04-15T15:24:51.572Z","status":"ssl_error","status_checked_at":"2026-04-15T15:24:39.138Z","response_time":63,"last_error":"SSL_read: unexpected eof while reading","robots_txt_status":"success","robots_txt_updated_at":"2025-07-24T06:49:26.215Z","robots_txt_url":"https://github.com/robots.txt","online":false,"can_crawl_api":true,"host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["assembler","assembly","instruction-set-architecture","machine-code","obfuscation","risc","virtual-machine","virtualization"],"created_at":"2024-11-16T10:18:14.242Z","updated_at":"2026-04-15T23:32:14.962Z","avatar_url":"https://github.com/Psmths.png","language":"C++","funding_links":[],"categories":[],"sub_categories":[],"readme":"\u003cp align=\"center\"\u003e\n  \u003cimg class='center' width=200 src='doc/media/rascal.PNG'\u003e\u003cbr\u003e\n  \u003ch2 align=\"center\"\u003eRISCAL CPU\u003c/h2\u003e\n\u003c/p\u003e\n\n\u003cp align=\"center\"\u003e\n  \u003cimg src=\"https://img.shields.io/github/license/Psmths/riscal-cpu.svg\"\u003e\n  \u003cimg src=\"https://img.shields.io/badge/Maintained%3F-yes-green.svg\"\u003e\n  \u003cimg src=\"https://github.com/Psmths/riscal-cpu/workflows/CodeQL/badge.svg\"\u003e\n  \u003cimg src=\"https://github.com/Psmths/riscal-cpu/actions/workflows/c-cpp.yml/badge.svg\"\u003e\n\u003c/p\u003e\n\nRISCAL is a 32-bit custom instruction set architecture virtual machine. It is intended to be used for learning/research purposes. In a nutshell, RISCAL provides:\n\n* 32-bit, fixed-length instruction set\n* 16 General-purpose registers\n* FLAGS, stack pointer, return pointer registers\n* 65536 words of program memory, can be extended to 2^32 bytes\n* Ability to set up and leverage a return stack to send and retrieve data from RISCAL after exit\n\n## Getting Started\n\nThis repo comes preloaded with several examples. To build the examples:\n```\ngit clone https://github.com/Psmths/riscal-cpu\ncd riscal-cpu\nmake examples\n```\n\nThe built examples will be available in the `bin/` directory. \n\nTo leverage RISCAL from a program, use the following methods:\n```\nunsigned char *run();\nvoid load_rom(unsigned char *rom, int rom_size);\nvoid load_stack(unsigned char *data, int data_size);\n```\n\nThe easiest way to get starting programming RISCAL is to grab a copy of [customasm](https://github.com/hlorenzi/customasm). This repo contains the custom instruction set definition in the examples directory, in the file riscal.asm to get you started, as well as plenty of supporting examples to use as guides and references.\n\n## Debugging RISCAL\n\nAs it stands RISCAL does not have a formal debugger. You can set a debugging flag, however, in the debugger.hpp file:\n\n```\n#ifndef DBG_HPP\n#define DBG_HPP\n\n#define DEBUG\n\n#endif\n```\n\nThis will print to stdout all registers for each operation that the VM performs, as well as a stack dump.\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fpsmths%2Friscal-cpu","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fpsmths%2Friscal-cpu","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fpsmths%2Friscal-cpu/lists"}