{"id":44052312,"url":"https://github.com/pulp-platform/axi_vga","last_synced_at":"2026-02-07T23:36:03.907Z","repository":{"id":92130266,"uuid":"560825809","full_name":"pulp-platform/axi_vga","owner":"pulp-platform","description":null,"archived":false,"fork":false,"pushed_at":"2025-06-23T09:20:34.000Z","size":630,"stargazers_count":5,"open_issues_count":0,"forks_count":1,"subscribers_count":4,"default_branch":"main","last_synced_at":"2025-06-23T10:23:31.941Z","etag":null,"topics":[],"latest_commit_sha":null,"homepage":null,"language":"SystemVerilog","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"other","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/pulp-platform.png","metadata":{"files":{"readme":"README.md","changelog":"CHANGELOG.md","contributing":null,"funding":null,"license":"LICENSE","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null,"zenodo":null}},"created_at":"2022-11-02T11:00:14.000Z","updated_at":"2025-03-26T01:11:24.000Z","dependencies_parsed_at":"2024-09-10T13:16:08.223Z","dependency_job_id":null,"html_url":"https://github.com/pulp-platform/axi_vga","commit_stats":null,"previous_names":[],"tags_count":5,"template":false,"template_full_name":null,"purl":"pkg:github/pulp-platform/axi_vga","repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/pulp-platform%2Faxi_vga","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/pulp-platform%2Faxi_vga/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/pulp-platform%2Faxi_vga/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/pulp-platform%2Faxi_vga/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/pulp-platform","download_url":"https://codeload.github.com/pulp-platform/axi_vga/tar.gz/refs/heads/main","sbom_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/pulp-platform%2Faxi_vga/sbom","scorecard":null,"host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":286080680,"owners_count":29212754,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2026-02-07T23:14:30.912Z","status":"ssl_error","status_checked_at":"2026-02-07T23:14:17.253Z","response_time":63,"last_error":"SSL_connect returned=1 errno=0 peeraddr=140.82.121.5:443 state=error: unexpected eof while reading","robots_txt_status":"success","robots_txt_updated_at":"2025-07-24T06:49:26.215Z","robots_txt_url":"https://github.com/robots.txt","online":false,"can_crawl_api":true,"host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":[],"created_at":"2026-02-07T23:36:03.238Z","updated_at":"2026-02-07T23:36:03.902Z","avatar_url":"https://github.com/pulp-platform.png","language":"SystemVerilog","funding_links":[],"categories":[],"sub_categories":[],"readme":"# AXI VGA\n\nThis repository contains a free and open-source, fully synthesizable VGA controller requesting pixel data directly using configurable AXI bursts. It is part of the PULP ecosystem.\n\n## Caveats\n\nWhile future improvements may relax these constraints, currently:\n\n* We only support AXI data widths of 32b to 1024b.\n* The pixel size in memory must be equal to the sum of the hardware channel widths.\n* The pixel size in memory must be a divisor of the data bus width.\n\n## Reconfiguring AXI VGA\n\nTo simplify VGA reconfiguration in your project, you can include the GNU Make fragment `axi_vga.mk` in your makefile, for example:\n\n```make\ninclude $(shell bender path axi_vga)/axi_vga.mk\n\n# Inject alternative register layout if needed\n$(AXI_VGA_ROOT)/data/axi_vga.hjson: config/axi_vga.json\n    cp $\u003c $@\n\n# Rebuild VGA RTL\nall: axi_vga\n```\n\n## Simulation\n\nA simple standalone testbench is provided. If you have access to Questa Advanced Simulator, you can run it using the scripts provided in `vsim`:\n\n```\nmake vsim\n```\n\n## Licensing\n\nEverything in this repository is licensed under the Solderpad Hardware License 0.51 (see `LICENSE`), with the exception of the regfile RTL (`src/axi_vga_reg_*.sv`) which is generated by a fork of lowRISC's [`regtool`](https://github.com/lowRISC/opentitan/blob/master/util/regtool.py) and licensed under Apache 2.0.\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fpulp-platform%2Faxi_vga","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fpulp-platform%2Faxi_vga","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fpulp-platform%2Faxi_vga/lists"}