{"id":13408431,"url":"https://github.com/pulp-platform/pulp","last_synced_at":"2026-02-07T23:36:53.477Z","repository":{"id":29875707,"uuid":"122994841","full_name":"pulp-platform/pulp","owner":"pulp-platform","description":"This is the top-level project for the PULP Platform. It instantiates a PULP open-source system with a PULP SoC (microcontroller) domain accelerated by a PULP cluster with 8 cores.","archived":false,"fork":false,"pushed_at":"2024-04-17T11:11:44.000Z","size":8171,"stargazers_count":433,"open_issues_count":34,"forks_count":116,"subscribers_count":33,"default_branch":"master","last_synced_at":"2024-07-31T20:30:33.925Z","etag":null,"topics":[],"latest_commit_sha":null,"homepage":null,"language":"SystemVerilog","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"other","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/pulp-platform.png","metadata":{"files":{"readme":"README.md","changelog":"CHANGELOG.md","contributing":null,"funding":null,"license":"LICENSE.md","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null}},"created_at":"2018-02-26T16:11:47.000Z","updated_at":"2024-07-25T00:59:06.000Z","dependencies_parsed_at":"2024-04-23T19:06:06.227Z","dependency_job_id":"d65b5645-d978-4dc7-b951-0acf6f758898","html_url":"https://github.com/pulp-platform/pulp","commit_stats":null,"previous_names":[],"tags_count":3,"template":false,"template_full_name":null,"purl":"pkg:github/pulp-platform/pulp","repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/pulp-platform%2Fpulp","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/pulp-platform%2Fpulp/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/pulp-platform%2Fpulp/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/pulp-platform%2Fpulp/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/pulp-platform","download_url":"https://codeload.github.com/pulp-platform/pulp/tar.gz/refs/heads/master","sbom_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/pulp-platform%2Fpulp/sbom","scorecard":null,"host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":286080680,"owners_count":29212755,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2026-02-07T23:36:15.537Z","status":"ssl_error","status_checked_at":"2026-02-07T23:36:12.879Z","response_time":63,"last_error":"SSL_read: unexpected eof while reading","robots_txt_status":"success","robots_txt_updated_at":"2025-07-24T06:49:26.215Z","robots_txt_url":"https://github.com/robots.txt","online":false,"can_crawl_api":true,"host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":[],"created_at":"2024-07-30T20:00:52.830Z","updated_at":"2026-02-07T23:36:48.468Z","avatar_url":"https://github.com/pulp-platform.png","language":"SystemVerilog","funding_links":[],"categories":["Projects and IPs","Systems","Open Source Implementations"],"sub_categories":["Information Technology","Cores"],"readme":"## Citing\nIf you are using PULP in your academic work you can cite us:\n```\n@ARTICLE{8715500,\n  author={Pullini, Antonio and Rossi, Davide and Loi, Igor and Tagliavini, Giuseppe and Benini, Luca},\n  journal={IEEE Journal of Solid-State Circuits}, \n  title={Mr.Wolf: An Energy-Precision Scalable Parallel Ultra Low Power SoC for IoT Edge Processing}, \n  year={2019},\n  volume={54},\n  number={7},\n  pages={1970-1981},\n  doi={10.1109/JSSC.2019.2912307}}\n```\n\n# PULP\n\nPULP (Parallel Ultra-Low-Power) is an open-source multi-core computing platform \npart of the of the ongoing collaboration between ETH Zurich and the University \nof Bologna - started in 2013.\n\nThe PULP architecture targets IoT end-node applications requiring flexible \nprocessing of data streams generated by multiple sensors, such as accelerometers, \nlow-resolution cameras, microphone arrays, vital signs monitors.\n\nPULP consists of an advanced microcontroller architecture representing a significant \nstep ahead in terms of completeness and complexity with respect to\nPULPino, taking care of autonomous I/O, advanced data pre-processing, external interrupts, \nand including a tightly-coupled cluster of processors to which compute-intensive kernels \ncan be offloaded from a main processor.\nThe PULP architecture includes:\n\n- Either the RI5CY core or the zero-riscy one as main core\n- Autonomous Input/Output subsystem (uDMA)\n- New memory subsystem\n- Support for Hardware Processing Engines (HWPEs)\n- New simple interrupt controller\n- New peripherals\n- New parallel computing cluster\n- New system DMA\n- New event unit\n- New SDK\n\nRISCY is an in-order, single-issue core with 4 pipeline stages and it has\nan IPC close to 1, full support for the base integer instruction set (RV32I),\ncompressed instructions (RV32C) and multiplication instruction set extension\n(RV32M). It can be configured to have single-precision floating-point\ninstruction set extension (RV32F). It implements several ISA extensions\nsuch as: hardware loops, post-incrementing load and store instructions,\nbit-manipulation instructions, MAC operations, support fixed-point operations,\npacked-SIMD instructions and the dot product. It has been designed to increase\nthe energy efficiency of in ultra-low-power signal processing applications.\nRISCY implementes a subset of the 1.9 privileged specification.\nFurther information about the core can be found at\nhttp://ieeexplore.ieee.org/abstract/document/7864441/\nand in the documentation of the IP.\n\nzero-riscy is an in-order, single-issue core with 2 pipeline stages and it\nhas full support for the base integer instruction set (RV32I) and\ncompressed instructions (RV32C).\nIt can be configured to have multiplication instruction set extension (RV32M)\nand the reduced number of registers extension (RV32E). It has been designed to\ntarget ultra-low-power and ultra-low-area constraints. zero-riscy implementes\na subset of the 1.9 privileged specification.\nFurther information about the core can be found at\nhttp://ieeexplore.ieee.org/document/8106976/\nand in the documentation of the IP.\n\nPULP includes a new efficient I/O subsystem via a uDMA (micro-DMA) which\ncommunicates with the peripherals autonomously. The core just needs to program\nthe uDMA and wait for it to handle the transfer.\nFurther information about the core can be found at\nhttp://ieeexplore.ieee.org/document/8106971/\nand in the documentation of the IP.\n\nPULP supports I/O on interfaces such as:\n\n- SPI (as master)\n- I2S\n- Camera Interface (CPI)\n- I2C\n- UART\n- JTAG\n\nPULP also supports integration of hardware accelerators (Hardware\nProcessing Engines) that share memory with the RI5CY core and are programmed on\nthe memory map. An example accelerator, performing multiply-accumulate on a\nvector of fixed-point values, can be found in `hwpe-mac-engine` (after\nupdating the IPs: see below in the Getting Started section).\nThe `hwpe-stream` and `hwpe-ctrl` folders contain the IPs necessary to\nplug streaming accelerators into a PULP system on the data and control plane.\nFor further information on how to design and integrate such accelerators,\nsee `hwpe-stream/doc` and https://arxiv.org/abs/1612.05974.\n\n## Getting Started\n\n### Prerequisites\nTo be able to use the PULP platform, you need the PULP toolchain.\nThe instructions to get it can be found here: https://github.com/pulp-platform/pulp-riscv-gnu-toolchain.\n\n\n### Building the RTL simulation platform\nTo build the RTL simulation platform, start by getting the latest version of the\nIPs composing the PULP system:\n```\nsource setup/vsim.sh\n\nmake checkout\n\nmake scripts\n\nmake build\n```\n**NOTE:** An error might occur running the scripts (*Failed to spawn child process.Too many open files (os error 24).*) while a fix is WIP a workaround is to increase the number of processes avilable to your machine by setting for example ulimit to 4096 (ulimit -n 4096).\n\nThis command builds a version of the simulation platform with no dependencies on\nexternal models for peripherals. See below (Proprietary verification IPs) for\ndetails on how to plug in some models of real SPI, I2C, I2S peripherals.\n\nDefault dependency management is done using bender to gather IPs. If you would like to \nuse the legacy IPApproX tool, set the `IPAPPROX` environment variable, \ne.g. by running `export IPAPPROX=1`, and continue at your own risk.\n\n#### Working on IPs\nThe easiest way to work on an individual IP is to clone it using bender with the following command:\n```\n./bender clone $IP\n```\nThis will checkout the IP to the `working_dir` directory, where it can be modified and the changes committed and pushed.\nThe correct link will be set through an override in the `Bender.local` file, forcing the bender tool to use this version of the dependency.\nTo build the platform, make sure to start at the `make scripts` step above after calling `./bender clone`. \n\nOnce the changes are complete, please ensure the `Bender.yml` files in the packages calling the IP dependency are accordingly updated with the new version.\nThe `bender parents` command can assist in determining which dependencies' `Bender.yml` files need updating.\nPlease note that when modifying dependency versions, the `./bender update` command needs to be called to re-resolve the correct versions.\nOnce the update is complete, the corresponding line from Bender.local can be removed to revert to normal dependency resolution, no longer using the version in `working_dir` (be sure to call `./bender update`). \nFor more information check out the [bender documentation](https://github.com/pulp-platform/bender).\n\n\n### Downloading and running simple C regression tests\nFinally, you can download and run the tests; for that you can checkout the\nfollowing repositories:\n\n- Runtime tests: https://github.com/pulp-platform/regression_tests\n\n- Pulp runtime:  https://github.com/pulp-platform/pulp-runtime\n\nNow you can change directory to your favourite test e.g.: for an hello world\ntest, run\n\n```\ngit clone https://github.com/pulp-platform/regression_tests.git\n\ngit clone https://github.com/pulp-platform/pulp-runtime.git\n\nsource pulp-runtime/configs/pulp.sh\n\nexport PATH=*path to riscv gcc toolchain*/bin:$PATH\n\nexport PULP_RISCV_GCC_TOOLCHAIN= *path to riscv gcc toolchain*\n\ncd regression_tests/hello\n\nmae clean all run gui=1\n\n```\nThe open-source simulation platform relies on JTAG to emulate preloading of the\nPULP L2 memory. If you want to simulate a more realistic scenario (e.g.\naccessing an external SPI Flash), look at the sections below.\n\nIn case you want to see the Modelsim GUI, just type\n```\nmake conf gui=1\n```\nbefore starting the simulation.\n\nIf you want to save a (compressed) VCD for further examination, type\n```\nmake conf vsim/script=export_run.tcl\n```\nbefore starting the simulation. You will find the VCD in\n`build/\u003cSRC_FILE_NAME\u003e/pulp/export.vcd.gz` where \n`\u003cSRC_FILE_NAME\u003e` is the name of the C source of the test.\n\n## Proprietary verification IPs\nThe full simulation platform can take advantage of a few models of commercial\nSPI, I2C, I2S peripherals to attach to the open-source PULP simulation platform.\nIn `rtl/vip/spi_flash`, `rtl/vip/i2c_eeprom`, `rtl/vip/i2s` you find the\ninstructions to install SPI, I2C and I2S models.\n\nWhen the SPI flash model is installed, it will be possible to switch to a more\nrealistic boot simulation, where the internal ROM of PULP is used to perform an\ninitial boot and to start to autonomously fetch the program from the SPI flash.\nTo do this, the `LOAD_L2` parameter of the testbench has to be switched from\n`JTAG` to `STANDALONE`.\n\n## PULP-SDK\n\nIf you are a software developer, you can find the PULP-SDK here: https://github.com/pulp-platform/pulp-sdk.\n\n## PULP platform structure\nAfter being fully setup as explained in the Getting Started section, this root\nrepository is structured as follows:\n- `rtl/tb` contains the main platform testbench and the related files.\n- `rtl/vip` contains the verification IPs used to emulate external peripherals,\n  e.g. SPI flash and camera.\n- `rtl` could also contain other material (e.g. global includes, top-level\n  files)\n- `sim` contains the ModelSim/QuestaSim simulation platform.\n- `pulp-sdk` contains the PULP software development kit; `pulp-sdk/tests`\n  contains all tests released with the SDK.\n- `Bender.yml` contains all dependency and source file information for the bender tool.\n\n## Requirements\nThe RTL platform has the following requirements:\n- Relatively recent Linux-based operating system; we tested *Ubuntu 16.04* and\n  *CentOS 7*.\n- ModelSim in reasonably recent version (we tested it with version *10.6b*).\n- Python 3.4, with the `pyyaml` module installed (you can get that with\n  `pip3 install pyyaml`).\n- The SDK has its own dependencies, listed in\n  https://github.com/pulp-platform/pulp-sdk/blob/master/README.md\n\n## Repository organization\nThe PULP platforms is highly hierarchical and the Git repositories for the various \nIPs follow the hierarchy structure to keep maximum flexibility.\nMost of the complexity of the IP updating system are hidden behind the bender tool; \nhowever, a few details are important to know:\n- Do not assume that the `master` branch of an arbitrary IP is stable; many\n  internal IPs could include unstable changes at a certain point of their\n  history. Conversely, in top-level platforms (`pulpissimo`, `pulp`) we always\n  use *stable* versions of the IPs. Therefore, you should be able to use the\n  `master` branch of `pulpissimo` safely.\n- By default, the IPs will be collected from GitHub using HTTPS. This makes it\n  possible for everyone to clone them without first uploading an SSH key to\n  GitHub. However, for development it is often easier to use SSH instead,\n  particularly if you want to push changes back.\n\nThe tools used to collect IPs and create scripts for simulation have many\nfeatures that are not necessarily intended for the end user, but can be useful\nfor developers; if you want more information, e.g. to integrate your own\nrepository into the flow, you can find documentation at\nhttps://github.com/pulp-platform/bender/blob/master/README.md\n\n## External contributions\nThe supported way to provide external contributions is by forking one of our\nrepositories, applying your patch and submitting a pull request where you\ndescribe your changes in detail, along with motivations.\nThe pull request will be evaluated and checked with our regression test suite\nfor possible integration.\nIf you want to replace our version of an IP with your GitHub fork, just add it \nto the corresponding Bender.yml file, or use an override in a Bender.local in \nthe top repository.\nWhile we are quite relaxed in terms of coding style, please try to follow these\nrecommendations:\nhttps://github.com/pulp-platform/ariane/blob/master/CONTRIBUTING.md\n\n## Known issues\nThe current version of the PULP platform does not include yet an FPGA port\nor example scripts for ASIC synthesis; both things may be deployed in the\nfuture.\nSimulation flows different from ModelSim/QuestaSim have only have limited testing.\n\n## Support \u0026 Questions\nFor support on any issue related to this platform or any of the IPs, please add\nan issue to our tracker on https://github.com/pulp-platform/pulpissimo/issues\n\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fpulp-platform%2Fpulp","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fpulp-platform%2Fpulp","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fpulp-platform%2Fpulp/lists"}