{"id":24883359,"url":"https://github.com/regymm/mit_sd_controller_improved","last_synced_at":"2026-01-06T14:48:08.157Z","repository":{"id":65451282,"uuid":"293752402","full_name":"regymm/mit_sd_controller_improved","owner":"regymm","description":"Improved version of http://web.mit.edu/6.111/volume2/www/f2018/tools/sd_controller.v","archived":false,"fork":false,"pushed_at":"2021-12-06T03:16:38.000Z","size":8,"stargazers_count":10,"open_issues_count":0,"forks_count":0,"subscribers_count":2,"default_branch":"master","last_synced_at":"2025-03-25T22:36:47.640Z","etag":null,"topics":["fpga","sdcard","sdhc","spi","verilog"],"latest_commit_sha":null,"homepage":"","language":"Verilog","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":null,"status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/regymm.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":null,"code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null}},"created_at":"2020-09-08T08:44:04.000Z","updated_at":"2025-01-08T18:58:28.000Z","dependencies_parsed_at":"2023-01-25T03:15:58.835Z","dependency_job_id":null,"html_url":"https://github.com/regymm/mit_sd_controller_improved","commit_stats":null,"previous_names":[],"tags_count":0,"template":false,"template_full_name":null,"repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/regymm%2Fmit_sd_controller_improved","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/regymm%2Fmit_sd_controller_improved/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/regymm%2Fmit_sd_controller_improved/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/regymm%2Fmit_sd_controller_improved/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/regymm","download_url":"https://codeload.github.com/regymm/mit_sd_controller_improved/tar.gz/refs/heads/master","host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":245814749,"owners_count":20676808,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["fpga","sdcard","sdhc","spi","verilog"],"created_at":"2025-02-01T13:48:53.944Z","updated_at":"2026-01-06T14:48:08.123Z","avatar_url":"https://github.com/regymm.png","language":"Verilog","funding_links":[],"categories":[],"sub_categories":[],"readme":"## mit_sd_controller_improved\nImproved version of http://web.mit.edu/6.111/volume2/www/f2018/tools/sd_controller.v\n\n... and more. \n\n### Improvements\n\n- SDHC card support: send CMD8 after CMD0 and read the full R7 response. Change ACMD41 parameter to show host SDHC support. \n- Send about 74 \u003c400KHz pulses to initialize, instead of default which wait for a few seconds.\n- Use a normal speed clock and a slow pulsed clock instead of clock dividers. Good for timing analysis. \n- Initialization/Read/Write tested OK on a SanDisk 16GB SDHC card -- works on my machine! \n\n### sd_controller.v usage\n\nInterfaces are the same as the original except clocks. \n\n`clk` is the main, fast clock and `clk_pulse_slow` is the pulsed, slow SPI clock. \n\nMy `clk` is 62.5MHz and `clk_pulse_slow` is generated by:\n\n```verilog\n// slow clock\nreg [4:0]clkcounter = 0;\nalways @ (posedge clk) begin\n    if (rst) clkcounter \u003c= 5'b0;\n    else clkcounter \u003c= clkcounter + 1;\nend\nwire clk_pulse_slow = (clkcounter == 5'b0);\n```\n\nIf you use a different main clock or slow  pulse frequency, you may want to change the boot counter:\n\n```verilog\nboot_counter \u003c= 27'd005_000;\n```\n\nand this: \n\n```verilog\nif (boot_counter[2]) sclk_sig \u003c= ~sclk_sig;\n```\n\nto make sure more than 74 cycles are sent slower than 400KHz during initialization. \n\nReferences are at the top of `sd_controller.v`. \n\n---\n\n below are my own stuffs \n\n---\n\n### sdcard.v wrapper\n\nThis wrapper(written by me) can provide an easy memory-like interface to the sdcard. Can be used as memory-mapped IO for home-brew FPGA CPUs. Has 512 bytes cache(will be synthesis into block RAM). \n\nInterface: \n\n```verilog\ninput [15:0]a,\ninput [31:0]d,\ninput we,\noutput reg [31:0]spo,\n```\n\nUsage: \n\n```\nread/write 0x0000 to 0x01fc: 128*32 block cache\nread/write 0x1000: get/set \u003caddress\u003e for R/W, auto 512 aligned (may purge existing cache)\nwrite 0x1004: do a read at \u003caddress\u003e (may purge existing cache)\nwrite 0x1008: do a write to \u003caddress\u003e (write cache to sector)\nread 0x2000: negative card detect\nread 0x2004: write protected\nread 0x2010: ready, used for polling\nread 0x2014: cache dirty?\n```\n\nFor example write 0xdeadbeef to the beginning of sector 16:\n\n```\nwrite 0x10 to 0x1000\nwrite 1 to 0x1004\nread 0x2010 until get 1\nwrite 0xdeadbeef to 0x0000\nwrite 1 to 0x1008\nread 0x2010 until get 1\n```\n\n### Circuit connection\n\nTheoretically this will work:\n\n```\n 3.3V          ----+++              wp\n                   |||         +---- =-----\n                   RRR         =8\n MISO(SD_DAT[0]) --|||---------=7\n                   |||  GND ---=6\n SCLK(SD_CLK)    --||+---------=5\n                   ||   VCC ---=4\n                   ||   GND ---=3\n MOSI(SD_CMD)    --|+----------=2\n CS(SD_DAT[3])   --+-----------=1\n                                 +=9\n                                   +-------\n```\n\nMy PMOD extension board is different from this but also works. \n\n### License\n\nGPL-v3. Original author has approved the use of his code in GPL-v3 projects. \n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fregymm%2Fmit_sd_controller_improved","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fregymm%2Fmit_sd_controller_improved","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fregymm%2Fmit_sd_controller_improved/lists"}