{"id":13958923,"url":"https://github.com/risclite/ARM9-compatible-soft-CPU-core","last_synced_at":"2025-07-21T00:32:25.922Z","repository":{"id":41178249,"uuid":"152972347","full_name":"risclite/ARM9-compatible-soft-CPU-core","owner":"risclite","description":"This ARMv4-compatible CPU core is written in synthesiable verilog.It could launch uCLinux and Linux in MODELSIM. It has high Dhrystone benchmark value: 1.2 DMIPS/MHz.  It could be utilized in your FPGA design as one submodule, if you master the interface of this .v file.  This IP core is very compact. It is one .v file and has only less 1800 lines.","archived":false,"fork":false,"pushed_at":"2020-10-14T07:26:51.000Z","size":105850,"stargazers_count":76,"open_issues_count":3,"forks_count":32,"subscribers_count":6,"default_branch":"master","last_synced_at":"2024-11-28T02:35:38.397Z","etag":null,"topics":["32-bit","armv4","cpu","verilog"],"latest_commit_sha":null,"homepage":null,"language":"Verilog","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"apache-2.0","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/risclite.png","metadata":{},"created_at":"2018-10-14T12:39:18.000Z","updated_at":"2024-11-26T23:42:21.000Z","dependencies_parsed_at":"2022-07-10T16:00:40.613Z","dependency_job_id":null,"html_url":"https://github.com/risclite/ARM9-compatible-soft-CPU-core","commit_stats":null,"previous_names":[],"tags_count":0,"template":false,"template_full_name":null,"purl":"pkg:github/risclite/ARM9-compatible-soft-CPU-core","repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/risclite%2FARM9-compatible-soft-CPU-core","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/risclite%2FARM9-compatible-soft-CPU-core/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/risclite%2FARM9-compatible-soft-CPU-core/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/risclite%2FARM9-compatible-soft-CPU-core/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/risclite","download_url":"https://codeload.github.com/risclite/ARM9-compatible-soft-CPU-core/tar.gz/refs/heads/master","sbom_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/risclite%2FARM9-compatible-soft-CPU-core/sbom","host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":266221320,"owners_count":23894966,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["32-bit","armv4","cpu","verilog"],"created_at":"2024-08-08T13:02:06.932Z","updated_at":"2025-07-21T00:32:25.915Z","avatar_url":"https://github.com/risclite.png","language":"Verilog","funding_links":[],"categories":["CPU RISC-V"],"sub_categories":["网络服务_其他"],"readme":null,"project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Frisclite%2FARM9-compatible-soft-CPU-core","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Frisclite%2FARM9-compatible-soft-CPU-core","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Frisclite%2FARM9-compatible-soft-CPU-core/lists"}