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and IPs","Verilog","CPU RISC-V","Applications"],"sub_categories":["Information Technology","网络服务_其他"],"readme":"Hummingbirdv2 E203 Core and SoC \n===============================\n\n[![Deploy Documentation](https://github.com/riscv-mcu/e203_hbirdv2/workflows/Deploy%20Documentation/badge.svg)](https://doc.nucleisys.com/hbirdv2)\n\n\u003e [!NOTE]\n\u003e **Hummingbird E603** is now available —— a 64-bit RISC-V core you can\nfreely use for academic and non-commercial projects.  \n\u003e Explore it here: [Nuclei-Software/e603_hbird](https://github.com/Nuclei-Software/e603_hbird)\n\nAbout\n-----\n\nThis repository hosts the project for open-source Hummingbirdv2 E203 RISC-V processor Core and SoC, it's developped and opensourced by [Nuclei System Technology](www.nucleisys.com), the leading RISC-V IP and Solution company based on China Mainland.\n\nThis's an upgraded version of the project Hummingbird E203 maintained in [SI-RISCV/e200_opensource](https://github.com/SI-RISCV/e200_opensource), so we call it Hummingbirdv2 E203, and its architecture is shown in the figure below.\n![hbirdv2](pics/hbirdv2_soc.JPG)\n\n\nIn this new version, we have following updates.\n* Add NICE(Nuclei Instruction Co-unit Extension) for E203 core, so user could create customized HW co-units with E203 core easily.\n* Integrate the APB interface peripherals(GPIO, I2C, UART, SPI, PWM) from [PULP Platform](https://github.com/pulp-platform) into Hummingbirdv2 SoC, these peripherals are implemented in Verilog language, so it's easy for user to understand. \n* Add new development boards(Nuclei ddr200t and mcu200t) support for Hummingbirdv2 SoC. \n\n**Welcome to visit https://github.com/riscv-mcu/hbird-sdk/ to use software development kit for the Hummingbird E203.**\n\n**Welcome to visit https://www.rvmcu.com/community.html to participate in the discussion of the Hummingbird E203.**\n\n**Welcome to visit http://www.rvmcu.com/ for more comprehensive information of availiable RISC-V MCU chips and embedded development.**\n\n\nDetailed Introduction and Quick Start-up\n----------------------------------------\n\nWe have provided very detailed introduction and quick start-up documents to help you ramping it up. \n\nThe detailed introduction and the quick start documentation can be seen \nfrom https://doc.nucleisys.com/hbirdv2/.\n\nBy following the guidences from the doc, you can very easily start to use Hummingbirdv2 E203 processor Core and SoC.\n\nWhat are you waiting for? Try it out now!\n\nDedicated FPGA-Boards and JTAG-Debugger \n---------------------------------------\n\nIn order to easy user to study RISC-V in a quick and easy way, we have made dedicated FPGA-Boards and JTAG-Debugger.\n\n#### Nuclei ddr200t development board\n\n\u003cimg src=\"pics/DDR200T.JPG\" width= 80% alt=\"DDR200T\"/\u003e\n\n#### Nuclei mcu200t development board\n\n\u003cimg src=\"pics/MCU200T.JPG\" width= 80% alt=\"MCU200T\"/\u003e\n\n#### Hummingbird Debugger\n\n![Debugger](pics/debugger.JPG)\n\nThe detailed introduction and the relevant documentation can be seen from https://nucleisys.com/developboard.php.\n\nHummingBird SDK\n---------------\n\nClick https://github.com/riscv-mcu/hbird-sdk for software development kit.\n\nWeChat Group\n------------\n\nIf you would like to join our WeChat group for discussion and support,\nplease scan the following QR code:\n\n![wechat QR code](./pics/QR_code.png)\n\nRelease History\n---------------\n\n#### Notice\n\n* **Many people asked if this core and SoC can be commercially used, the answer as below:**\n  - According to the Apache 2.0 license, this open-sourced core can be used in commercial way.\n  - But the feature is not full. \n  - The main purpose of this open-sourced core is to be used by students/university/research/\n    and entry-level-beginners, hence, the commercial quality (bug-free) and service of this core\n    is not not not warranted!!! \n\n#### Release 0.2.1, Feb 26, 2021\n\nThis is `release 0.2.1` of Hummingbirdv2.\n\n+ Hbirdv2 SoC\n  - Covert the peripheral IPs implemented in system verilog to verilog implementation.\n\n+ SIM\n  - Add new simulation tool(iVerilog) and wave viewer(GTKWave) support for Hummingbirdv2 SoC\n\n#### Release 0.1.2, Nov 20, 2020\n\nThis is `release 0.1.2` of Hummingbirdv2.\n\n+ Hbirdv2 SoC\n  - Remove unused module\n  - Add one more UART\n\n+ FPGA\n  - Add new development board(Nuclei mcu200t) support for Hummingbirdv2 SoC\n \n#### Release 0.1.1, Jul 28, 2020\n\nThis is `release 0.1.1` of Hummingbirdv2.\n\nNOTE:\n  + This's an upgraded version of the project Hummingbird E203 maintained in\n    [SI-RISCV/e200_opensource](https://github.com/SI-RISCV/e200_opensource).\n  + Here are the new features of this release.\n    - Add NICE(Nuclei Instruction Co-unit Extension) for E203 core\n    - Integrate the APB interface peripherals(GPIO, I2C, UART, SPI, PWM) from PULP Platform\n    - Add new development board(Nuclei ddr200t) support for Hummingbirdv2 SoC. \n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Friscv-mcu%2Fe203_hbirdv2","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Friscv-mcu%2Fe203_hbirdv2","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Friscv-mcu%2Fe203_hbirdv2/lists"}