{"id":16829639,"url":"https://github.com/rtfb/vtisa-cpu-deadend","last_synced_at":"2026-01-04T02:08:47.902Z","repository":{"id":200319151,"uuid":"705214815","full_name":"rtfb/vtisa-cpu-deadend","owner":"rtfb","description":null,"archived":false,"fork":false,"pushed_at":"2024-08-15T15:53:55.000Z","size":23,"stargazers_count":0,"open_issues_count":0,"forks_count":0,"subscribers_count":2,"default_branch":"main","last_synced_at":"2025-01-24T07:44:27.781Z","etag":null,"topics":[],"latest_commit_sha":null,"homepage":null,"language":"Verilog","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"apache-2.0","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/rtfb.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":"LICENSE","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null}},"created_at":"2023-10-15T11:37:02.000Z","updated_at":"2024-08-15T15:58:19.000Z","dependencies_parsed_at":null,"dependency_job_id":"54f4ef94-31da-4c16-9b42-2ab78b625e29","html_url":"https://github.com/rtfb/vtisa-cpu-deadend","commit_stats":null,"previous_names":["rtfb/vtisa-cpu"],"tags_count":0,"template":false,"template_full_name":"TinyTapeout/tt05-verilog-demo","repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/rtfb%2Fvtisa-cpu-deadend","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/rtfb%2Fvtisa-cpu-deadend/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/rtfb%2Fvtisa-cpu-deadend/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/rtfb%2Fvtisa-cpu-deadend/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/rtfb","download_url":"https://codeload.github.com/rtfb/vtisa-cpu-deadend/tar.gz/refs/heads/main","host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":244110086,"owners_count":20399561,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":[],"created_at":"2024-10-13T11:34:52.773Z","updated_at":"2026-01-04T02:08:47.875Z","avatar_url":"https://github.com/rtfb.png","language":"Verilog","funding_links":[],"categories":[],"sub_categories":[],"readme":"![](../../workflows/gds/badge.svg) ![](../../workflows/docs/badge.svg) ![](../../workflows/test/badge.svg)\n\n# Very Tiny ISA CPU\n\nA very minimalistic and naive CPU implementation with a custom ISA.\n\n## Prepare Dev Environment\n\nInstall Verilog compilers:\n\n```\nsudo apt install iverilog verilator\n```\n\nInstall testing prerequisites:\n```\ncd src\nvirtualenv env\nsource env/bin/activate\npip3 install cocotb pytest\n```\n\n# What is Tiny Tapeout?\n\nTinyTapeout is an educational project that aims to make it easier and cheaper than ever to get your digital designs manufactured on a real chip.\n\nTo learn more and get started, visit https://tinytapeout.com.\n\n## Verilog Projects\n\nEdit the [info.yaml](info.yaml) and uncomment the `source_files` and `top_module` properties, and change the value of `language` to \"Verilog\". Add your Verilog files to the `src` folder, and list them in the `source_files` property.\n\nThe GitHub action will automatically build the ASIC files using [OpenLane](https://www.zerotoasiccourse.com/terminology/openlane/).\n\n## How to enable the GitHub actions to build the ASIC files\n\nPlease see the instructions for:\n\n- [Enabling GitHub Actions](https://tinytapeout.com/faq/#when-i-commit-my-change-the-gds-action-isnt-running)\n- [Enabling GitHub Pages](https://tinytapeout.com/faq/#my-github-action-is-failing-on-the-pages-part)\n\n## Resources\n\n- [FAQ](https://tinytapeout.com/faq/)\n- [Digital design lessons](https://tinytapeout.com/digital_design/)\n- [Learn how semiconductors work](https://tinytapeout.com/siliwiz/)\n- [Join the community](https://discord.gg/rPK2nSjxy8)\n\n## What next?\n\n- Submit your design to the next shuttle [on the website](https://tinytapeout.com/#submit-your-design). The closing date is **November 4th**.\n- Edit this [README](README.md) and explain your design, how it works, and how to test it.\n- Share your GDS on your social network of choice, tagging it #tinytapeout and linking Matt's profile:\n  - LinkedIn [#tinytapeout](https://www.linkedin.com/search/results/content/?keywords=%23tinytapeout) [matt-venn](https://www.linkedin.com/in/matt-venn/)\n  - Mastodon [#tinytapeout](https://chaos.social/tags/tinytapeout) [@matthewvenn](https://chaos.social/@matthewvenn)\n  - Twitter [#tinytapeout](https://twitter.com/hashtag/tinytapeout?src=hashtag_click) [@matthewvenn](https://twitter.com/matthewvenn)\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Frtfb%2Fvtisa-cpu-deadend","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Frtfb%2Fvtisa-cpu-deadend","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Frtfb%2Fvtisa-cpu-deadend/lists"}