{"id":28802654,"url":"https://github.com/ryanfb/apple-ii_openfpga","last_synced_at":"2026-01-31T18:32:48.671Z","repository":{"id":240565390,"uuid":"686665285","full_name":"ryanfb/Apple-II_openFPGA","owner":"ryanfb","description":"Apple-II_MiSTer ported to openFPGA (Analogue Pocket)","archived":false,"fork":false,"pushed_at":"2024-06-05T14:23:45.000Z","size":2260,"stargazers_count":5,"open_issues_count":3,"forks_count":0,"subscribers_count":2,"default_branch":"main","last_synced_at":"2025-06-18T08:07:17.663Z","etag":null,"topics":[],"latest_commit_sha":null,"homepage":null,"language":"VHDL","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"gpl-3.0","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/ryanfb.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":"LICENSE","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null}},"created_at":"2023-09-03T14:52:10.000Z","updated_at":"2024-08-18T18:21:41.000Z","dependencies_parsed_at":"2024-06-05T16:22:49.879Z","dependency_job_id":null,"html_url":"https://github.com/ryanfb/Apple-II_openFPGA","commit_stats":null,"previous_names":["ryanfb/apple-ii_openfpga"],"tags_count":0,"template":false,"template_full_name":"open-fpga/core-template","purl":"pkg:github/ryanfb/Apple-II_openFPGA","repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/ryanfb%2FApple-II_openFPGA","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/ryanfb%2FApple-II_openFPGA/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/ryanfb%2FApple-II_openFPGA/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/ryanfb%2FApple-II_openFPGA/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/ryanfb","download_url":"https://codeload.github.com/ryanfb/Apple-II_openFPGA/tar.gz/refs/heads/main","sbom_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/ryanfb%2FApple-II_openFPGA/sbom","scorecard":null,"host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":286080680,"owners_count":28949414,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2026-01-31T18:30:42.805Z","status":"ssl_error","status_checked_at":"2026-01-31T18:30:19.593Z","response_time":128,"last_error":"SSL_connect returned=1 errno=0 peeraddr=140.82.121.6:443 state=error: unexpected eof while reading","robots_txt_status":"success","robots_txt_updated_at":"2025-07-24T06:49:26.215Z","robots_txt_url":"https://github.com/robots.txt","online":false,"can_crawl_api":true,"host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":[],"created_at":"2025-06-18T08:07:08.253Z","updated_at":"2026-01-31T18:32:48.666Z","avatar_url":"https://github.com/ryanfb.png","language":"VHDL","funding_links":[],"categories":[],"sub_categories":[],"readme":"# Apple-II_openFPGA\n\n[Apple-II_MiSTer](https://github.com/MiSTer-devel/Apple-II_MiSTer) ported to openFPGA (Analogue Pocket).\n\nBased off [open-fpga/core-template](https://github.com/open-fpga/core-template).\n\n![A screenshot of an Analogue Pocket displaying the Apple II text-mode bootsplash](./bootsplash.jpg)\n\n## Building\n\nBuild with e.g.:\n\n    docker run --platform linux/amd64 -t --rm -v $(pwd)/src/fpga:/build didiermalenfant/quartus:22.1-apple-silicon quartus_sh --flow compile ap_core\n\nThen use [pf-dev-tools](https://pypi.org/project/pf-dev-tools/) (`pip install pf-dev-tools==1.0.9`) to package a zip:\n\n    pf build src/config.toml src/fpga/output_files/ap_core.rbf build\n\nA zip should be built in `build/`, which you can copy to your Analogue Pocket.\n\n## Notes\n\n * [`src/fpga/rtl`](https://github.com/ryanfb/Apple-II_openFPGA/tree/main/src/fpga/rtl) = [Apple-II_MiSTer `rtl`](https://github.com/MiSTer-devel/Apple-II_MiSTer/tree/master/rtl). The goal is not to touch upstream MiSTer RTL and just wire a new openFPGA system interface into it. If this seems feasible, I may convert the `rtl` directory to a git submodule.\n * Instead of using [Apple-II_MiSTer's (MiSTer-specific) `module emu` in `Apple-II.sv`](https://github.com/MiSTer-devel/Apple-II_MiSTer/blob/master/Apple-II.sv), we declare [a new (openFPGA-specific) `module MAIN_APPLE2` in `src/fpga/core/openfpga_top/main.sv`](https://github.com/ryanfb/Apple-II_openFPGA/blob/main/src/fpga/core/openfpga_top/main.sv), which we then wire in to the RTL `apple2_top` at [`rtl/apple2_top.vhd`](https://github.com/MiSTer-devel/Apple-II_MiSTer/blob/master/rtl/apple2_top.vhd). This `MAIN_APPLE2` module interface is then used from [the main openFPGA core top in `src/fpga/core/core_top.v`](https://github.com/ryanfb/Apple-II_openFPGA/blob/main/src/fpga/core/core_top.v).\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fryanfb%2Fapple-ii_openfpga","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fryanfb%2Fapple-ii_openfpga","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fryanfb%2Fapple-ii_openfpga/lists"}