{"id":13641769,"url":"https://github.com/semify-eda/fstdumper","last_synced_at":"2026-04-09T04:33:54.612Z","repository":{"id":118130024,"uuid":"395004853","full_name":"semify-eda/fstdumper","owner":"semify-eda","description":"Verilog VPI module to dump FST (Fast Signal Trace) databases","archived":false,"fork":false,"pushed_at":"2023-09-19T08:51:26.000Z","size":321,"stargazers_count":14,"open_issues_count":4,"forks_count":2,"subscribers_count":2,"default_branch":"main","last_synced_at":"2024-08-03T01:24:43.722Z","etag":null,"topics":["simulator","systemverilog","verilog","vpi","waveform"],"latest_commit_sha":null,"homepage":"","language":"C","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"gpl-3.0","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/semify-eda.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":"LICENSE","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null}},"created_at":"2021-08-11T13:48:17.000Z","updated_at":"2024-06-18T17:26:55.000Z","dependencies_parsed_at":null,"dependency_job_id":"3f0f15e9-ea6a-4a49-b042-c258c5e87c96","html_url":"https://github.com/semify-eda/fstdumper","commit_stats":null,"previous_names":[],"tags_count":1,"template":false,"template_full_name":null,"repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/semify-eda%2Ffstdumper","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/semify-eda%2Ffstdumper/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/semify-eda%2Ffstdumper/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/semify-eda%2Ffstdumper/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/semify-eda","download_url":"https://codeload.github.com/semify-eda/fstdumper/tar.gz/refs/heads/main","host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":223827679,"owners_count":17209826,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["simulator","systemverilog","verilog","vpi","waveform"],"created_at":"2024-08-02T01:01:24.210Z","updated_at":"2026-04-09T04:33:54.600Z","avatar_url":"https://github.com/semify-eda.png","language":"C","funding_links":[],"categories":["C","Verification Frameworks"],"sub_categories":[],"readme":"\u003ca href=\"https://github.com/semify-eda/fstdumper/releases/latest\"\u003e\n\u003cimg align=\"right\" src=\"https://github.com/semify-eda/fstdumper/actions/workflows/compile.yml/badge.svg\"\u003e\n\u003c/a\u003e\n\n# fstdumper\nVerilog VPI module to dump FST (Fast Signal Trace) databases\n\n![fstdumper overview](doc/fstdumper_overview.svg)\n\n\n\u003e FST: Fast Signal Trace. This format is a block-based variant of IDX which is designed for very fast sequential and random access. FST has been designed to handle extremely large designs efficiently.\n\n# Overview\n\nThe aim of this project is to provide a unified VPI module working on most simulators that provide extensive VPI support to dump waveforms in the `.fst` format. The resulting `.fst` file can than be opened and viewed using the [GTKWave](http://gtkwave.sourceforge.net/) waveform viewer.\n\nBut why? Proprietary simulators usually bring with them their own proprietary waveform formats. While VCD (Value Change Dump) is supported by if not all simulators, it is not very efficient in terms of space and performance. That's where `fstdumper` comes in: the idea is to reduce reliance on proprietary waveform formats by providing the ability to use an open, efficient format such as FST.\n\nFor the dumper itself the excellent implementation from [Icarus Verilog](https://github.com/steveicarus/iverilog) has been adapted to work on other simulators too. Some iverilog specific features therefore had to be removed.\n\n## Simulator specific bits\n\nSome simulators support more of the VPI standard than others. This means that certain features of the dumper which rely on VPI constructs that aren't supported on all target simulators need to be disabled.\n\nThere is the possibility to enable simulator specific features by using defines:\n\nConfig file `/src/include/config.h`\n\n```\n#define ICARUS_VERILOG\n```\n\n# Example usage\n\n```\nmodule top;\n\nlogic clk;\n\ninitial\n  begin\n    $display(\"fstdumper!\");\n    clk = 1;\n    \n    $fstDumpfile(\"top.fst\");\n    $fstDumpvars(0, top);\n    $fstDumplimit(1000);\n    \n    # 5 $fstDumpall;\n    # 5 $fstDumpflush;\n    # 5 $fstDumpoff;\n    # 5 $fstDumpon;\n    # 5 $finish;\n  end\n\nalways #1 clk = ~clk;\n\nendmodule\n```\n\n# Compiling\n\nCompiling the `fstdumper` shared library is as easy as issuing:\n\n```\nmake fstdumper.so\n```\n\n## Example Simulation\n\nAn example for the **Icarus Verilog** simulator can be run with:\n\n```\nmake simulation-iverilog\n```\n\nAn example for the **Cadence Xcelium** simulator can be run with:\n\n```\nmake simulation-xrun\n```\n\n# Compatibility Matrix\n\n\n| Simulator       | Version               | Status |\n|-----------------|-----------------------|--------|\n| Icarus Verilog  | Version 11.0 (stable) | works  |\n| Cadence Xcelium | 19.09-s001            | works  |\n| Cadence Xcelium | 18.03-s007            | works  |\n| Mentor/Siemens Questa       | 10.7                  | WIP    |\n\nYou too can contribute by testing `fstdumper` on other simulators or other versions of these simulators. Any help is very much appreciated!\n\n# Contributing\n\nContributing in this projects follows the usual guidelines:\n\n- Fork the repository\n- Make your changes\n- Submit a Pull Request\n- After your Pull Request is accepted it will be merged\n\nBefore you make your changes, check to see if an issue exists already for the change you want to make. If not create one. We'll use the issue to have a conversation about the new feature you want to add or the problem you want to fix.\n\nThe versioning of the library follows the [Semantic Versioning](https://semver.org/) Specification.","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fsemify-eda%2Ffstdumper","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fsemify-eda%2Ffstdumper","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fsemify-eda%2Ffstdumper/lists"}