{"id":19466157,"url":"https://github.com/sifive/pydevicetree","last_synced_at":"2025-04-13T10:43:29.024Z","repository":{"id":61593500,"uuid":"220095614","full_name":"sifive/pydevicetree","owner":"sifive","description":"Python Library for Parsing Devicetree Source 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pydevicetree\n\nThis is a Python 3 library for parsing, querying, and modifying Devicetree Source v1 files as\ndescribed in the [Devicetree Specification v0.2](https://github.com/devicetree-org/devicetree-specification/releases/tag/v0.2).\n\n## Install\n\npydevicetree supports Python \u003e= 3.5 and can be installed with pip from the [Python Package Index](https://pypi.org/project/pydevicetree/).\n\n`pip install pydevicetree`\n\n## Tutorial\n\n### The Devicetree\n\nLet's say you have a file design.dts with the contents\n```\n/dts-v1/;\n\n/ {\n\t#address-cells = \u003c1\u003e;\n\t#size-cells = \u003c1\u003e;\n\tcompatible = \"my,design\";\n\taliases {\n\t\tserial0 = \"/soc/uart@10000000\";\n\t};\n\tchosen {\n\t\tstdout-path = \"/soc/uart@10000000:115200\";\n\t};\n\tcpus {\n\t\t#address-cells = \u003c1\u003e;\n\t\t#size-cells = \u003c0\u003e;\n\t\tcpu@0 {\n\t\t\tcompatible = \"sifive,rocket0\", \"riscv\";\n\t\t\tdevice_type = \"cpu\";\n\t\t\treg = \u003c0\u003e;\n\t\t\triscv,isa = \"rv32imac\";\n\t\t\tstatus = \"okay\";\n\t\t\ttimebase-frequency = \u003c1000000\u003e;\n\t\t\tsifive,dtim = \u003c\u0026dtim\u003e;\n\t\t\tinterrupt-controller {\n\t\t\t\t#interrupt-cells = \u003c1\u003e;\n\t\t\t\tcompatible = \"riscv,cpu-intc\";\n\t\t\t\tinterrupt-controller;\n\t\t\t};\n\t\t};\n\t};\n\tsoc {\n\t\t#address-cells = \u003c1\u003e;\n\t\t#size-cells = \u003c1\u003e;\n\t\tcompatible = \"my,design-soc\";\n\t\tranges;\n\t\tdtim: dtim@20000000 {\n\t\t\tcompatible = \"sifive,dtim0\";\n\t\t\treg = \u003c0x20000000 0x10000000\u003e;\n\t\t\treg-names = \"mem\";\n\t\t};\n\t\tuart: uart@10000000 {\n\t\t\tcompatible = \"sifive,uart0\";\n\t\t\treg = \u003c0x10000000 0x1000\u003e;\n\t\t\treg-names = \"control\";\n\t\t};\n\t};\n};\n```\n\n### Parsing the Tree\n\nParsing the tree is as easy as 1, 2...\n\n```\n\u003e\u003e\u003e from pydevicetree import Devicetree\n\u003e\u003e\u003e tree = Devicetree.parseFile(\"design.dts\")\n\u003e\u003e\u003e tree\n\u003cDevicetree my,design\u003e\n```\n\n### Querying the Tree\n\n#### By `compatible` string\n\n```\n\u003e\u003e\u003e tree.match(\"sifive,rocket0\")\n[\u003cNode cpu\u003e]\n```\n\n#### By path\n\n```\n\u003e\u003e\u003e tree.get_by_path(\"/soc/dtim\")\n\u003cNode dtim@20000000\u003e\n```\n\nDevicetree aliases are allowed in paths\n\n```\n\u003e\u003e\u003e tree.get_by_path(\"serial0\")\n\u003cNode uart@10000000\u003e\n```\n\n#### Getting `Node` properties\n\nThe value (or first value of a list/array) of a property can be retrieved with `Node.get_field()`\n\n```\n\u003e\u003e\u003e tree.match(\"sifive,rocket0\")[0].get_field(\"timebase-frequency\")\n1000000\n```\n\nThe list or array of values assigned to a property can be retrieved with `Node.get_fields()`\n\n```\n\u003e\u003e\u003e tree.match(\"sifive,rocket0\")[0].get_fields(\"compatible\")\n\u003cStringList ['sifive,rocket0', 'riscv']\u003e\n```\n\nThere are helper methods `Node.get_reg()` and `Node.get_ranges()` for the `reg` and `ranges`\nDevicetree properties.\n\n```\n\u003e\u003e\u003e tree.get_by_path(\"/soc/dtim\").get_reg()\n\u003cRegArray [536870912, 268435456]\u003e\n\u003e\u003e\u003e tree.get_by_path(\"/soc/dtim\").get_reg().get_by_name(\"mem\")\n(536870912, 268435456)\n\u003e\u003e\u003e \"0x%x\" % tree.get_by_path(\"/soc/dtim\").get_reg().get_by_name(\"mem\")[0]\n'0x20000000'\n```\n\n#### Getting `chosen` properties\n\n`Devicetree.chosen()` provides quick access to the properties of the `chosen` node\n\n```\n\u003e\u003e\u003e tree.chosen(\"stdout-path\")\n\u003cStringList ['/soc/uart@10000000:115200']\u003e\n```\n\n### Converting back to Devicetree\n\nAny tree or subtree can be converted back to Devicetree by calling `Node.to_dts()` or simply\nby `print`ing it:\n\n```\n\u003e\u003e\u003e print(tree.match(\"sifive,rocket0\")[0])\ncpu@0 {\n        #size-cells = \u003c0\u003e;\n        compatible = \"sifive,rocket0\", \"riscv\";\n        device_type = \"cpu\";\n        reg = \u003c0x0\u003e;\n        riscv,isa = \"rv32imac\";\n        status = \"okay\";\n        timebase-frequency = \u003c1000000\u003e;\n        sifive,dtim = \u003c\u0026dtim\u003e;\n        interrupt-controller {\n                #interrupt-cells = \u003c1\u003e;\n                compatible = \"riscv,cpu-intc\";\n                interrupt-controller;\n        };\n};\n```\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fsifive%2Fpydevicetree","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fsifive%2Fpydevicetree","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fsifive%2Fpydevicetree/lists"}