{"id":22754158,"url":"https://github.com/slaclab/axi-pcie-core","last_synced_at":"2026-05-11T07:02:24.191Z","repository":{"id":41251694,"uuid":"84127187","full_name":"slaclab/axi-pcie-core","owner":"slaclab","description":null,"archived":false,"fork":false,"pushed_at":"2026-03-05T21:59:18.000Z","size":59212,"stargazers_count":26,"open_issues_count":1,"forks_count":11,"subscribers_count":23,"default_branch":"main","last_synced_at":"2026-03-05T23:31:36.503Z","etag":null,"topics":[],"latest_commit_sha":null,"homepage":null,"language":"VHDL","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"other","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/slaclab.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":"LICENSE.txt","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null,"zenodo":null,"notice":null,"maintainers":null,"copyright":null,"agents":null,"dco":null,"cla":null}},"created_at":"2017-03-06T22:23:52.000Z","updated_at":"2026-02-27T20:01:35.000Z","dependencies_parsed_at":"2024-04-13T16:22:31.138Z","dependency_job_id":"0d1d42eb-c51d-48be-aceb-c7413dbf4070","html_url":"https://github.com/slaclab/axi-pcie-core","commit_stats":null,"previous_names":[],"tags_count":86,"template":false,"template_full_name":null,"purl":"pkg:github/slaclab/axi-pcie-core","repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/slaclab%2Faxi-pcie-core","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/slaclab%2Faxi-pcie-core/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/slaclab%2Faxi-pcie-core/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/slaclab%2Faxi-pcie-core/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/slaclab","download_url":"https://codeload.github.com/slaclab/axi-pcie-core/tar.gz/refs/heads/main","sbom_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/slaclab%2Faxi-pcie-core/sbom","scorecard":null,"host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":286080680,"owners_count":30209812,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2026-03-07T05:23:27.321Z","status":"ssl_error","status_checked_at":"2026-03-07T05:00:17.256Z","response_time":53,"last_error":"SSL_read: unexpected eof while reading","robots_txt_status":"success","robots_txt_updated_at":"2025-07-24T06:49:26.215Z","robots_txt_url":"https://github.com/robots.txt","online":false,"can_crawl_api":true,"host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":[],"created_at":"2024-12-11T06:15:51.611Z","updated_at":"2026-03-07T08:07:06.905Z","avatar_url":"https://github.com/slaclab.png","language":"VHDL","funding_links":[],"categories":[],"sub_categories":[],"readme":"# axi-pcie-core\n\n[DOE Code](https://www.osti.gov/doecode/biblio/75521)\n\nThis GIT repository is intended to be a common firmware library submodule used by many other applications.\n\nExample: https://github.com/slaclab/pgp-pcie-apps/tree/master/firmware/submodules\n\n\u003c!--- ######################################################## --\u003e\n\n# Before you clone the GIT repository as a submodule in another repo\n\n1) Create a github account:\n\u003e https://github.com/\n\n2) On the Linux machine that you will clone the github from, generate a SSH key (if not already done)\n\u003e https://help.github.com/articles/generating-a-new-ssh-key-and-adding-it-to-the-ssh-agent/\n\n3) Add a new SSH key to your GitHub account\n\u003e https://help.github.com/articles/adding-a-new-ssh-key-to-your-github-account/\n\n4) Setup for large filesystems on github\n```bash\n$ git lfs install\n```\n\n\u003c!--- ######################################################## --\u003e\n\n# How to load the driver\n\n```bash\n# Confirm that you have the board the computer with VID=1a4a (\"SLAC\") and PID=2030 (\"AXI Stream DAQ\")\n$ lspci -nn | grep SLAC\n04:00.0 Signal processing controller [1180]: SLAC National Accelerator Lab TID-AIR AXI Stream DAQ PCIe card [1a4a:2030]\n\n# Clone the driver github repo:\n$ git clone --recursive https://github.com/slaclab/aes-stream-drivers\n\n# Go to the driver directory\n$ cd aes-stream-drivers/data_dev/driver/\n\n# Build the driver\n$ make\n\n# Example of loading driver with 2MB DMA buffers\n$ sudo /sbin/insmod ./datadev.ko cfgSize=0x200000 cfgRxCount=256 cfgTxCount=16\n\n# Give appropriate group/permissions\n$ sudo chmod 666 /dev/data_dev*\n\n# Check for the loaded device\n$ cat /proc/data_dev0\n```\n\n\u003c!--- ######################################################## --\u003e\n\n# How to install the Rogue With Anaconda\n\n\u003e https://slaclab.github.io/rogue/installing/anaconda.html\n\n\u003c!--- ######################################################## --\u003e\n\n# How to reprogram the PCIe firmware via Rogue software\n\nNote: This update script will only work if the axi-pcie-core firmware already loaded in FPGA and won't work if the factory default is still loaded.  Use the JTAG interface and Vivado Hardware Manager to load the axi-pcie-core firmware for the first time.\n\n1) Setup the rogue environment\n```bash\n$ source /path/to/my/anaconda3/etc/profile.d/conda.sh\n$ conda activate rogue_env\n```\n\n2) Run the PCIe firmware update script:\n```bash\n$ python axi-pcie-core/python/updatePcieFpga.py --path \u003cPATH_TO_IMAGE_DIR\u003e\n```\nwhere \u003cPATH_TO_IMAGE_DIR\u003e is path to .MCS image directory\n\n3) Reboot the computer\n```bash\n$ sudo reboot\n```\n\n\n\u003c!--- ######################################################## --\u003e\n\n# Vivado flow for Alveo boards removed\n\nhttps://github.com/Xilinx/XilinxBoardStore/issues/470\n\nExample of copying over a board files to Linux Vivado install:\n\n```bash\n$ cp -rf au55c \u003cPATH_TO_VIVADO\u003e/data/xhub/boards/XilinxBoardStore/boards/Xilinx/.\n```\n\n\u003c!--- ######################################################## --\u003e\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fslaclab%2Faxi-pcie-core","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fslaclab%2Faxi-pcie-core","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fslaclab%2Faxi-pcie-core/lists"}