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[L3R4](https://github.com/SoCXin/Level)：160 MHz (655 CoreMark,4.09/MHz)\r\n\r\n## [简介](https://github.com/SoCXin/STM32U5A9/wiki)\r\n\r\n[STM32U5A9](https://www.st.com/zh/microcontrollers-microprocessors/stm32u5a9nj.html) \r\n\r\n### 关键特性\r\n\r\n* 160 MHz Cortex-M33 \r\n* 2.5 MB SRAM\r\n* 2x 14-bit ADC 2.5Msps\r\n* Neo-Chrom GPU(GPU2D),16-Kbyte DCACHE2\r\n* Chrom-GRC (GFXMMU) allowing up to 20 % of graphic resources optimization\r\n* MIPI® DSI host controller with two DSI lanes running at up to 500 Mbit/s each\r\n* 2 Octo-SPI memory interfaces\r\n* 16-bit HSPI memory interface up to 160 MHz\r\n* 480 nA Standby mode with RTC\r\n* 2 μA Stop 3 mode with 40-Kbyte SRAM\r\n* 8.2 μA Stop 3 mode with 2.5-Mbyte SRAM\r\n* 4.65 µA Stop 2 mode with 40-Kbyte SRAM\r\n* 17.5 µA Stop 2 mode with 2.5-Mbyte SRAM\r\n* 18.5 μA/MHz Run mode at 3.3 V\r\n\r\n## [资源收录](https://github.com/SoCXin)\r\n\r\n* [参考资源](src/)\r\n* [参考文档](docs/)\r\n* [参考工程](project/)\r\n\r\n## [选型建议](https://github.com/SoCXin)\r\n\r\n[STM32U5A9](https://github.com/SoCXin/STM32U5A9)\r\n\r\n\r\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fsocxin%2Fstm32u5a9","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fsocxin%2Fstm32u5a9","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fsocxin%2Fstm32u5a9/lists"}