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eth_phy_10g_rx_inst\n      ├── eth_phy_10g_rx_if - eth_phy_10g_rx_if_inst\n      │   ├── lfsr - descrambler_inst\n      │   ├── lfsr - prbs31_check_inst\n      │   ├── eth_phy_10g_rx_frame_sync - eth_phy_10g_rx_frame_sync_inst\n      │   ├── eth_phy_10g_rx_ber_mon - eth_phy_10g_rx_ber_mon_inst\n      │   └── eth_phy_10g_rx_watchdog - eth_phy_10g_rx_watchdog_inst\n      └── xgmii_baser_dec_64 - xgmii_baser_dec_inst\n  └── eth_phy_10g_tx - eth_phy_10g_tx_inst\n      ├── xgmii_baser_enc_64 - xgmii_baser_enc_inst\n      └── eth_phy_10g_tx_if - eth_phy_10g_tx_if_inst\n          ├── lfsr - scrambler_inst\n          └── lfsr - prbs31_gen_inst\n```\n\nPara obtener más información detallada sobre los bloques PCS, consulta la [documentación detallada en la Wiki](https://github.com/sofiavalos/Ethernet_10g_PCS/wiki/Bloques-PCS).\n\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fsofiavalos%2Fverilog_ethernet_10g_pcs","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fsofiavalos%2Fverilog_ethernet_10g_pcs","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fsofiavalos%2Fverilog_ethernet_10g_pcs/lists"}