{"id":20744241,"url":"https://github.com/stavros/multiplier4bit","last_synced_at":"2026-03-07T21:32:14.711Z","repository":{"id":72553040,"uuid":"237964054","full_name":"Stavros/Multiplier4bit","owner":"Stavros","description":"A 4bit Multiplier in VHDL","archived":false,"fork":false,"pushed_at":"2020-02-03T16:51:40.000Z","size":3081,"stargazers_count":3,"open_issues_count":0,"forks_count":1,"subscribers_count":2,"default_branch":"master","last_synced_at":"2025-03-11T12:50:58.998Z","etag":null,"topics":["fpga","full-adder","half-adder","vhdl","vhdl-code","vhdl-examples"],"latest_commit_sha":null,"homepage":null,"language":"VHDL","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":null,"status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/Stavros.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":null,"code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null}},"created_at":"2020-02-03T12:50:51.000Z","updated_at":"2024-03-28T01:31:44.000Z","dependencies_parsed_at":"2023-03-24T08:18:23.952Z","dependency_job_id":null,"html_url":"https://github.com/Stavros/Multiplier4bit","commit_stats":null,"previous_names":[],"tags_count":0,"template":false,"template_full_name":null,"purl":"pkg:github/Stavros/Multiplier4bit","repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/Stavros%2FMultiplier4bit","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/Stavros%2FMultiplier4bit/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/Stavros%2FMultiplier4bit/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/Stavros%2FMultiplier4bit/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/Stavros","download_url":"https://codeload.github.com/Stavros/Multiplier4bit/tar.gz/refs/heads/master","sbom_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/Stavros%2FMultiplier4bit/sbom","scorecard":null,"host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":286080680,"owners_count":30231632,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2026-03-07T19:01:10.287Z","status":"ssl_error","status_checked_at":"2026-03-07T18:59:58.103Z","response_time":53,"last_error":"SSL_read: unexpected eof while reading","robots_txt_status":"success","robots_txt_updated_at":"2025-07-24T06:49:26.215Z","robots_txt_url":"https://github.com/robots.txt","online":false,"can_crawl_api":true,"host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["fpga","full-adder","half-adder","vhdl","vhdl-code","vhdl-examples"],"created_at":"2024-11-17T07:14:47.369Z","updated_at":"2026-03-07T21:32:14.663Z","avatar_url":"https://github.com/Stavros.png","language":"VHDL","funding_links":[],"categories":[],"sub_categories":[],"readme":"# Multiplier4bit\n\nA 4bit Multiplier in VHDL \n\n## Information\n\nThis is a VHDL project for DSD-I1* a Cyclone IV FPGA built in Quartus 18.1 to build a 2 x 4bit number multiplier using Full Adders and Half Adders.\n\n**Diagram**:  \n![Diagram](./Multiplier4bit.jpg)\n\n**Behavioral VHDL code**: Multiplier4bit.vhd  \n**Testbench VHDL code**: Multiplier4bit_tb.vhd  \n\n**ModelSim**:  \n![ModelSim](./Multiplier4bit_modelsim.jpg)\n\n**FPGA**:  \n![FPGA](./Multiplier4bit_fpga.jpg)\n\n*Note: DSD-i1: A Mixed Functionality Development Board Geared Towards Digital Systems Design Education [DOI:10.1109/DSD.2019.00032](https://www.researchgate.net/deref/http%3A%2F%2Fdx.doi.org%2F10.1109%2FDSD.2019.00032?_sg%5B0%5D=v-cnN-1Q246lx6ZElyyd_L2GLjVH2cDblXKnupqF6zBTWGsRmigTw_ho2UEIExompd-pfg1aXKe2HxtKhm8yTj_qKA.RFCrYuolSv1xRRtksL0NU8xa-sfrV6ZTsQm8Z6Ge2xh6ypvMKM0sHAtBECzdcRJoFOjJpYWyh5DrIrnMCZrsYA)\n\n## Licence\n\nCopyright (c) 2019 Stavros Kalapothas (aka Stevaras) \u003cstavros@ubinet.gr\u003e.\nIt is free software, and may be redistributed under the terms of the GNU Licence.","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fstavros%2Fmultiplier4bit","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fstavros%2Fmultiplier4bit","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fstavros%2Fmultiplier4bit/lists"}