{"id":28000668,"url":"https://github.com/sysprog21/ca2023-lab3","last_synced_at":"2026-03-01T07:31:34.688Z","repository":{"id":205906508,"uuid":"715342246","full_name":"sysprog21/ca2023-lab3","owner":"sysprog21","description":"Lab3: Construct a single-cycle CPU with Chisel","archived":false,"fork":false,"pushed_at":"2023-11-20T10:22:07.000Z","size":31,"stargazers_count":18,"open_issues_count":1,"forks_count":60,"subscribers_count":4,"default_branch":"main","last_synced_at":"2025-05-08T23:54:09.839Z","etag":null,"topics":[],"latest_commit_sha":null,"homepage":null,"language":"Scala","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"mit","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/sysprog21.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":"LICENSE","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null,"zenodo":null}},"created_at":"2023-11-07T00:23:02.000Z","updated_at":"2024-12-18T19:45:21.000Z","dependencies_parsed_at":"2025-05-08T23:54:10.841Z","dependency_job_id":"bfbe325c-326f-4ac6-a0b8-07ade6d39ffa","html_url":"https://github.com/sysprog21/ca2023-lab3","commit_stats":null,"previous_names":["sysprog21/ca2023-lab3"],"tags_count":0,"template":false,"template_full_name":null,"purl":"pkg:github/sysprog21/ca2023-lab3","repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/sysprog21%2Fca2023-lab3","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/sysprog21%2Fca2023-lab3/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/sysprog21%2Fca2023-lab3/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/sysprog21%2Fca2023-lab3/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/sysprog21","download_url":"https://codeload.github.com/sysprog21/ca2023-lab3/tar.gz/refs/heads/main","sbom_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/sysprog21%2Fca2023-lab3/sbom","scorecard":null,"host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":286080680,"owners_count":29963733,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2026-03-01T06:55:38.174Z","status":"ssl_error","status_checked_at":"2026-03-01T06:53:04.810Z","response_time":124,"last_error":"SSL_connect returned=1 errno=0 peeraddr=140.82.121.6:443 state=error: unexpected eof while reading","robots_txt_status":"success","robots_txt_updated_at":"2025-07-24T06:49:26.215Z","robots_txt_url":"https://github.com/robots.txt","online":false,"can_crawl_api":true,"host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":[],"created_at":"2025-05-08T23:54:07.706Z","updated_at":"2026-03-01T07:31:34.612Z","avatar_url":"https://github.com/sysprog21.png","language":"Scala","funding_links":[],"categories":[],"sub_categories":[],"readme":"# Construct a single-cycle RISC-V CPU with Chisel\n\n\u003e [!WARNING]\n\u003e Please be aware that the Scala code in this repository is not entirely complete, as the instructor has omitted certain sections for students to work on independently.\n\n## Development Objectives\n\nOur goal is to create a RISC-V CPU that prioritizes simplicity while assuming a foundational understanding of digital circuits and the C programming language among its readers. The CPU should strike a balance between simplicity and sophistication, and we intend to maximize its functionality. This project encompasses the following key aspects, which will be prominently featured in the technical report:\n* Implementation in Chisel.\n* RV32I instruction set support.\n* Execution of programs compiled from the C programming language.\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fsysprog21%2Fca2023-lab3","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fsysprog21%2Fca2023-lab3","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fsysprog21%2Fca2023-lab3/lists"}