{"id":22904279,"url":"https://github.com/tomverbeure/intel_jtag_uart","last_synced_at":"2025-05-08T20:28:48.438Z","repository":{"id":62571205,"uuid":"364977289","full_name":"tomverbeure/intel_jtag_uart","owner":"tomverbeure","description":"A Python module to interact with an Intel JTAG UART","archived":false,"fork":false,"pushed_at":"2021-05-08T02:18:19.000Z","size":151,"stargazers_count":18,"open_issues_count":0,"forks_count":3,"subscribers_count":3,"default_branch":"main","last_synced_at":"2025-04-15T21:42:05.817Z","etag":null,"topics":["altera","fpga","intel","jtag","jtag-atlantic","python","uart"],"latest_commit_sha":null,"homepage":"https://pypi.org/project/intel_jtag_uart","language":"Python","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"mit","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/tomverbeure.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":"LICENSE","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null}},"created_at":"2021-05-06T16:46:34.000Z","updated_at":"2024-07-18T21:01:59.000Z","dependencies_parsed_at":"2022-11-03T17:01:15.104Z","dependency_job_id":null,"html_url":"https://github.com/tomverbeure/intel_jtag_uart","commit_stats":null,"previous_names":[],"tags_count":0,"template":false,"template_full_name":null,"repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/tomverbeure%2Fintel_jtag_uart","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/tomverbeure%2Fintel_jtag_uart/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/tomverbeure%2Fintel_jtag_uart/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/tomverbeure%2Fintel_jtag_uart/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/tomverbeure","download_url":"https://codeload.github.com/tomverbeure/intel_jtag_uart/tar.gz/refs/heads/main","host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":253143911,"owners_count":21860964,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["altera","fpga","intel","jtag","jtag-atlantic","python","uart"],"created_at":"2024-12-14T02:45:40.384Z","updated_at":"2025-05-08T20:28:48.418Z","avatar_url":"https://github.com/tomverbeure.png","language":"Python","funding_links":[],"categories":[],"sub_categories":[],"readme":"\n`intel_jtag_uart` is a Python module that can be used to interact with the JTAG UART instances inside\nIntel FPGA designs.\n\nThe official ways to do this are either interactively, through `nios2-terminal` utility,\nor by scripting some TCL code inside the Quartus System Console. There is no official \nstraightforward way to interact with a JTAG UART with Python. \n\nThis module is a wrapper around the `jtag_atlantic` shared library/DLL that is part of any\nmodern Quartus installation. (`jtag_atlantic` is the internal code name for the JTAG UART.)\n\nTo use this module, you need access to the `jtag_atlantic` shared library as well as the `jtag_client`\nshared library, which provides lower level JTAG-related functions.\n\n## Usage\n\n* Install this package with `pip3 install intel_jtag_uart`.\n* Point to the `jtag_atlantic` and `jtag_client` shared libraries, so that the module can find it.\n\n    The module uses the following sequence to find these libraries:\n\n    1. Look in the directory in which `intel_jtag_uart.py` is located\n    1. Look in the directory in which the executable that uses this module is located\n    1. Use the OS-provided way to find shared libraries. (E.g. for Linux, it will check\n       the directories of the `$LD_LIBRARY_PATH` environment variable.) \n    1. Look in the `$QUARTUS_ROOTDIR` directory\n\n    Most default Quartus installations will have `$QUARTUS_ROOTDIR` environment variable\n    set to the correct directory, so everything should just work\u0026trade;.\n\n* Use some variation of the script below:\n\n```python\nimport intel_jtag_uart\n\ntry:\n    ju = intel_jtag_uart.intel_jtag_uart()\n\nexcept Exception as e:\n    print(e)\n    sys.exit(0)\n\nju.write(b'r')\ntime.sleep(1)\nprint(\"read: \", ju.read())\n```\n\nThe script sends `r` to the JTAG UART, waits 1 seconds for a reply, and reads the\nreply, if there is any. If you have an Arrow/Terasic DECA FPGA board, you can check\nthings out right away with a [precompiled example bitstream](https://github.com/tomverbeure/intel_jtag_uart/tree/main/example/arrow_deca).\n\n## Full List of Functions/Methods\n\nUse [the source](https://github.com/tomverbeure/intel_jtag_uart/blob/main/src/intel_jtag_uart/intel_jtag_uart.py), Luke!\n\nThis module is a very thin wrapper around a handful of function calls that are mostly self-explanatory.\n\n## Bug Reports/Comments/Questions\n\nBug reports, comments, or questions can be entered through [the GitHub issue tracker](https://github.com/tomverbeure/intel_jtag_uart/issues)\nof this project.\n\n## References\n\n* [The Intel JTAG UART - Add a Serial Console to Your Design without Extra IO Pins](https://tomverbeure.github.io/2021/05/02/Intel-JTAG-UART.html)\n* [Write Your Own C and Python Clients for the Intel JTAG UART](https://tomverbeure.github.io/2021/05/08/Write-Your-Own-C-and-Python-Clients-for-Intel-JTAG-UART-with-libjtag_atlantic.html)\n* [`jtag_uart_example` project](https://github.com/tomverbeure/jtag_uart_example)\n* [intel-jtag-uart on pypi.org](https://pypi.org/project/intel-jtag-uart/)\n\n\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Ftomverbeure%2Fintel_jtag_uart","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Ftomverbeure%2Fintel_jtag_uart","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Ftomverbeure%2Fintel_jtag_uart/lists"}