{"id":16636715,"url":"https://github.com/trmckay/universal-otter-debugger","last_synced_at":"2026-02-06T21:01:37.641Z","repository":{"id":55583008,"uuid":"286616487","full_name":"trmckay/universal-otter-debugger","owner":"trmckay","description":"Implementation of the RISC-V UART Debugger for Cal Poly's Otter","archived":false,"fork":false,"pushed_at":"2020-12-20T17:01:28.000Z","size":2120,"stargazers_count":0,"open_issues_count":0,"forks_count":0,"subscribers_count":1,"default_branch":"master","last_synced_at":"2025-07-29T02:43:37.091Z","etag":null,"topics":[],"latest_commit_sha":null,"homepage":null,"language":"SystemVerilog","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"gpl-3.0","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/trmckay.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":"LICENSE","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null}},"created_at":"2020-08-11T01:32:15.000Z","updated_at":"2020-12-20T17:01:30.000Z","dependencies_parsed_at":"2022-08-15T03:40:17.805Z","dependency_job_id":null,"html_url":"https://github.com/trmckay/universal-otter-debugger","commit_stats":null,"previous_names":[],"tags_count":3,"template":false,"template_full_name":null,"purl":"pkg:github/trmckay/universal-otter-debugger","repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/trmckay%2Funiversal-otter-debugger","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/trmckay%2Funiversal-otter-debugger/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/trmckay%2Funiversal-otter-debugger/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/trmckay%2Funiversal-otter-debugger/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/trmckay","download_url":"https://codeload.github.com/trmckay/universal-otter-debugger/tar.gz/refs/heads/master","sbom_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/trmckay%2Funiversal-otter-debugger/sbom","scorecard":null,"host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":286080680,"owners_count":29175823,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2026-02-06T20:14:21.878Z","status":"ssl_error","status_checked_at":"2026-02-06T20:14:21.443Z","response_time":59,"last_error":"SSL_read: unexpected eof while reading","robots_txt_status":"success","robots_txt_updated_at":"2025-07-24T06:49:26.215Z","robots_txt_url":"https://github.com/robots.txt","online":false,"can_crawl_api":true,"host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":[],"created_at":"2024-10-12T06:22:36.110Z","updated_at":"2026-02-06T21:01:37.622Z","avatar_url":"https://github.com/trmckay.png","language":"SystemVerilog","funding_links":[],"categories":[],"sub_categories":[],"readme":"# universal-otter-debugger\n\n## About ##\n\nThis project allows you to debug and program your Otter from a host machine.\n\n![Block diagram](doc/block_diag.png)\n\n## Features ##\n\n- Read/write registers\n- Read/write memory\n- Program the Otter without re-synthesizing\n- Breakpoints\n- Pause/resume execution\n- Configurable variables for commonly used values\n- Communicates over the same micro-USB used to program the board\n\n\n## Required files ##\n\nDebugging your Otter depends on three semi-independent projects: a general RISC-V debugger module, its client, and the adapter\nfor the Otter. This repository houses the adapter (`otter_DBU.sv`).\n\n```\ngit clone https://github.com/trmckay/universal-otter-debugger\n```\n\nThe [RVDB project](https://github.com/trmckay/riscv-uart-debugger) houses everything else you need.\nYou will need to install the client to your machine and include the Verilog files under `module` in\nyour Otter project.\n\nI recommend thoroughly reading the README there, as well as skimming the man page (`man rvdb`) once it\nis installed.\n\n\n## Implementing the module ##\n\nImplementing the module for your Otter is very simple, as it uses standard Otter signals.\nIn general, internal MCU signals should be used when `db_active` is low and debugger signals when it is high.\n\nMore detailed instructions are included the [documentation](doc/multicycle_instructions.pdf).\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Ftrmckay%2Funiversal-otter-debugger","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Ftrmckay%2Funiversal-otter-debugger","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Ftrmckay%2Funiversal-otter-debugger/lists"}