{"id":18656503,"url":"https://github.com/uinika/uinio-logic-24mhz","last_synced_at":"2026-01-24T15:35:30.289Z","repository":{"id":65688431,"uuid":"583624882","full_name":"uinika/UINIO-Logic-24MHz","owner":"uinika","description":"the 24MHz sampling rate Logic Analyzer base on CY7C68013A.","archived":false,"fork":false,"pushed_at":"2024-12-13T03:47:11.000Z","size":27054,"stargazers_count":9,"open_issues_count":0,"forks_count":5,"subscribers_count":2,"default_branch":"main","last_synced_at":"2025-05-13T14:40:32.299Z","etag":null,"topics":[],"latest_commit_sha":null,"homepage":null,"language":"HTML","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":null,"status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/uinika.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":null,"code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null}},"created_at":"2022-12-30T11:09:28.000Z","updated_at":"2025-01-03T22:54:21.000Z","dependencies_parsed_at":"2024-04-19T10:27:54.921Z","dependency_job_id":"c1a12b11-2a41-4686-aaa5-b45eb4d54c17","html_url":"https://github.com/uinika/UINIO-Logic-24MHz","commit_stats":null,"previous_names":[],"tags_count":0,"template":false,"template_full_name":null,"purl":"pkg:github/uinika/UINIO-Logic-24MHz","repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/uinika%2FUINIO-Logic-24MHz","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/uinika%2FUINIO-Logic-24MHz/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/uinika%2FUINIO-Logic-24MHz/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/uinika%2FUINIO-Logic-24MHz/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/uinika","download_url":"https://codeload.github.com/uinika/UINIO-Logic-24MHz/tar.gz/refs/heads/main","sbom_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/uinika%2FUINIO-Logic-24MHz/sbom","scorecard":null,"host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":286080680,"owners_count":28730322,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2026-01-24T10:24:43.181Z","status":"ssl_error","status_checked_at":"2026-01-24T10:24:36.112Z","response_time":89,"last_error":"SSL_read: unexpected eof while reading","robots_txt_status":"success","robots_txt_updated_at":"2025-07-24T06:49:26.215Z","robots_txt_url":"https://github.com/robots.txt","online":false,"can_crawl_api":true,"host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":[],"created_at":"2024-11-07T07:23:47.509Z","updated_at":"2026-01-24T15:35:30.265Z","avatar_url":"https://github.com/uinika.png","language":"HTML","funding_links":[],"categories":[],"sub_categories":[],"readme":"# UINIO-Logic-24MHz 逻辑分析仪\r\n\r\n[**UINIO-Logic-24MHz**](https://gitee.com/uinika/UINIO-Logic-24MHz) 是一款基于**英飞凌**（已收购**赛普拉斯 Cypress**）的 [**CY7C68013A**](https://www.infineon.com/cms/en/product/universal-serial-bus-usb-power-delivery-controller/peripheral-controllers/ez-usb-fx2lp/cy7c68013a-56ltxit/) 型 `USB2.0` 控制器，以及 [**Sigork**](https://sigrok.org/) 开源固件方案的逻辑分析仪电路设计。拥有 `24MHz` 采样频率，以及 **8** 个采样通道。\r\n\r\n![](./Images/PCB-3D-1.png)\r\n\r\n## 设计概要\r\n\r\n1. 采用 **USB Type-C** 接口，以及 `10 Pin` 的牛角插座；\r\n2. **CY7C68013A** 型 USB 控制器芯片采用了体积较小的 `QFN56` 封装；\r\n3. **AT24C64** 微芯 EEPROM 存储器芯片同样采用体积小巧的 `TSSOP8` 封装；\r\n4. 板载 `24MHz` 无源贴片晶振，阻容贴片元件全部采用 `0402` 的小规格封装；\r\n5. 增加具有**三态输出**功能的 **74HC245** 八路信号收发器，提升信号采集的稳定性；\r\n6. 低压差线性稳压器可以灵活选用 `ME6211C33M5G` 或者 `A6303AE5R-33A` 等 `SOT23-5` 封装的 **LDO** 芯片；\r\n7. **USB Type-C** 接口位置新增一组 TVS 瞬态电压抑制二极管；\r\n\r\n## 注意事项\r\n\r\n- LED 指示灯 `D2` 连接至 **CY7C68013A** 的 `PA0` 引脚，而 `D3` 则被连接至 `PA1` 引脚；\r\n- 需要结合 **Sigork** 的开源固件 [sigrok-firmware-fx2lafw](https://github.com/wuxx/sigrok-firmware-fx2lafw)，并且搭配 [PulseView](https://sigrok.org/wiki/Downloads) 上位机协同使用；\r\n\r\n## 参考技术文档\r\n\r\n[UinIO.com 电子技术实验室](http://uinio.com/) 为 **UINIO-Logic-24MHz** 开源项目提供了如下一系列技术参考资料：\r\n\r\n- [《UINIO-Logic-24MHz 核心板原理图》](http://uinio.com/my/works/UINIO-Logic-24MHz/UINIO-Logic-24MHz-Schematic.pdf)\r\n- [《交互式 BOM 物料清单与 PCB 版图在线预览》](http://uinio.com/archives/BOM/UINIO-Logic-24MHz.html)\r\n- [《快速上手 UINIO-Logic-24MHz 逻辑分析仪》](http://uinio.com/Project/UINIO-Logic-24MHz/)\r\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fuinika%2Fuinio-logic-24mhz","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fuinika%2Fuinio-logic-24mhz","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fuinika%2Fuinio-logic-24mhz/lists"}