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(alternate SW/FPGA bitstream for LambdaConcept USB2Sniffer)\n\nGithub: [https://github.com/ultraembedded/usb2sniffer](https://github.com/ultraembedded/usb2sniffer)\n\n## Intro\nThis repo contains an alternative set of FPGA gateware and SW for performing USB2.0 capture with the [LambaConcept USB2Sniffer](http://blog.lambdaconcept.com/doku.php?id=products:usb_sniffer) FPGA board ([buy](http://shop.lambdaconcept.com/home/35-usb2-sniffer.html)).\n\nThe key difference between this and the stock FPGA gateware for this board is that this version contains more advanced USB protocol decoding within the FPGA, allowing for more powerful on-target device id / endpoint / SOF filtering.  \nCapturing USB traffic is done via a command-line tool, and the resulting binary can be converted into several 3rd party output formats for display or can be parsed using the provided SW library.\n\n![USB2Sniffer](docs/usb2sniffer_board.jpg)\n\n## Getting Started\n\n#### Cloning\n\nTo clone this project and its dependencies;\n\n```\ngit clone --recursive https://github.com/ultraembedded/usb2sniffer.git\n\n```\n\n#### Usage\n\nWith the bitstream loaded onto the target board, the following sequence can be used to capture some USB traffic;\n\n```\n# Build the command line applications\ncd sw\nmake\n\n# Start a capture\n./capture/capture -f /tmp/capture.bin\n\n# Convert to PCAP\n./convert/convert -f /tmp/capture.bin -o capture.pcap\n\n# Convert to txt file\n./convert/convert -f /tmp/capture.bin -o capture.txt\n\n# Convert to USB file (readable using LcSniff)\n./convert/convert -f /tmp/capture.bin -o capture.usb\n```\n\n#### LambdaConcept Lcsniff\n\nAfter converting captured data from binary to .usb file format, the [LambdaConcept Lcsniff GUI](https://github.com/lambdaconcept/usb2sniffer-qt) can be used to view the captured data;\n\n![Lcsniff](docs/lcsniff.png)\n\n#### Wireshark - Raw USB (DLT_USB_2_0)\n\nTo view PCAPs with Wireshark, a recent version is required (\u003e= 2019).\n\nTo get a recent dev build of Wireshark on Ubuntu/Debian/Mint;\n```\nsudo add-apt-repository ppa:wireshark-dev/stable\nsudo apt-get update\nsudo apt-get install wireshark\n```\n\n![Wireshark Raw](docs/wireshark.png)\n\n#### Wireshark - Decoded data (DLT_USB_LINUX)\n\nWireshark has some more advanced protocol dissectors available if you are willing to lose some lower-level USB details;\n```\n./usbmonpcap/usbmonpcap -f /tmp/capture.bin -o capture.pcap\n```\n\n![Wireshark Decoded](docs/wireshark_usbmonpcap.png)\n\n\n#### Example - Audio capture\n\nAs a demo, the following example shows how the USB2Sniffer can be used to capture USB audio traffic;\n```\n# Find the USB audio device number\n$ lsusb\nBus 001 Device 025: ID 0d8c:013c C-Media Electronics, Inc. CM108 Audio Controller\n\n# Start the capture\n./sw/capture/capture -f capture_audio.bin\n\n# [Play some audio through the USB device, stop the capture]\n\n# Extract stream of bytes going to device 25 (audio controller) endpoint 1 (audio output)\n./sw/dump_bin/dump_bin -f capture_audio.bin -o capture.pcm -d 25 -e 1\n\n# Convert back to WAV file using FFMpeg\nffmpeg -ac 2 -f s16le -i capture.pcm output.wav\n\n# Done..\n```\n\n\n## IP Designs Used\n\nMost of the IP cores used in this project are designed by myself and available as easy to follow open-source Verilog modules.\nThe remainder (DDR3, CDC, PLL) are IP cores built with Xilinx Vivado.\n\n| Name                   | Description                                                 | Provider |\n| ---------------------- | ------------------------------------------------------------| -------- |\n| usb_sniffer            | [USB Sniffer Core](https://github.com/ultraembedded/core_usb_sniffer) | - |\n| ulpi_wrapper           | [ULPI PHY Interface](https://github.com/ultraembedded/core_ulpi_wrapper) | - |\n| ft60x_axi              | [FTDI USB3.0 to AXI bus master](https://github.com/ultraembedded/core_ft60x_axi) | - |\n| mig_axis.xci           | [MIG DDR3 Controller](https://github.com/ultraembedded/usb2sniffer/blob/master/cores/ddr/mig_axis.xci) | Xilinx |\n| axi_cdc_buffer.xci     | [AXI4 Clock Domain Converter](https://github.com/ultraembedded/usb2sniffer/blob/master/cores/cdc/axi_cdc_buffer.xci) | Xilinx |\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fultraembedded%2Fusb2sniffer","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fultraembedded%2Fusb2sniffer","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fultraembedded%2Fusb2sniffer/lists"}