{"id":15416853,"url":"https://github.com/ussserrr/spartan6-mcu-configuration","last_synced_at":"2025-10-06T13:29:58.640Z","repository":{"id":113442710,"uuid":"162898885","full_name":"ussserrr/spartan6-mcu-configuration","owner":"ussserrr","description":"Configure Xilinx Spartan-6 FPGA using Texas Instruments ARM MCU","archived":false,"fork":false,"pushed_at":"2018-12-24T16:53:38.000Z","size":151,"stargazers_count":8,"open_issues_count":0,"forks_count":1,"subscribers_count":2,"default_branch":"master","last_synced_at":"2025-03-29T08:43:33.485Z","etag":null,"topics":["fpga","mcu","spartan6"],"latest_commit_sha":null,"homepage":null,"language":"C","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"mit","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/ussserrr.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":"LICENSE","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null}},"created_at":"2018-12-23T14:42:57.000Z","updated_at":"2023-11-05T22:12:08.000Z","dependencies_parsed_at":null,"dependency_job_id":"915eee60-a5fb-4301-8658-146a16a6e7b1","html_url":"https://github.com/ussserrr/spartan6-mcu-configuration","commit_stats":{"total_commits":4,"total_committers":1,"mean_commits":4.0,"dds":0.0,"last_synced_commit":"41bf37de71890379703b0832d4d031ed04037de5"},"previous_names":[],"tags_count":0,"template":false,"template_full_name":null,"repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/ussserrr%2Fspartan6-mcu-configuration","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/ussserrr%2Fspartan6-mcu-configuration/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/ussserrr%2Fspartan6-mcu-configuration/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/ussserrr%2Fspartan6-mcu-configuration/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/ussserrr","download_url":"https://codeload.github.com/ussserrr/spartan6-mcu-configuration/tar.gz/refs/heads/master","host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":249715476,"owners_count":21315054,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["fpga","mcu","spartan6"],"created_at":"2024-10-01T17:14:02.306Z","updated_at":"2025-10-06T13:29:53.606Z","avatar_url":"https://github.com/ussserrr.png","language":"C","funding_links":[],"categories":[],"sub_categories":[],"readme":"## Description\nProven example showing how to configure (flash the firmware) Xilinx Spartan-6 FPGA (XC6SLX-2FTG256C) using ARM MCU (Texas Instruments Tiva-C TM4C1294NCPDT). The design is not strictly hardware-specific and can be easily ported to another MCU and similar FPGA.\n\nChosen method - slave serial. It is a basic synchronous, single data-wire interface. The bitstream is stored in MCU Flash memory.\n\n\n## Bitstream\nYou need to generate the `.bin` bitstream using Xilinx BitGen utility with following command-line options:\n\n```\n-g Binary:yes\n```\n\nIn PlanAhead, for example, it can be done via GUI in the 'Bitstream Settings' section of Flow Navigator:\n![planahead](/planahead.png)\n\nThe bitstream is stored in MCU Flash memory in form of pair of `.c/.h` files.\n\n - bitstream.c:\n\n```C\n#include \u003cbitstream.h\u003e\n\nconst unsigned char bitstream_fw[] = {\n    ...\n    0x00, 0x93, 0x30, 0xe1, 0xff, 0xcf, 0x30, 0xc1, 0x00, 0x81, 0x31, 0x81,\n    ...\n};\n```\n\n - bitstream.h\n\n```C\n#ifndef BITSTREAM_H_\n#define BITSTREAM_H_\n\nextern const unsigned char bitstream_fw[];\n\n#endif /* BITSTREAM_H_ */\n```\n\n - main.c\n\n```C\n...\n#include \"bitstream.h\"\n#define SPARTAN_FW_SIZE 54664  // in bytes\n...\n```\n\nIt always has the same size no matter what functionality your firmware is providing. To convert `.bin` file to C header use some sort of converter program (e.g. using Python or C on your PC).\n\n\n## Pinout\nGeneral schematic (omit the JTAG part) (see UG380):\n![pinout](/pinout.png)\n\nNote that some \"feedback\" pins such as INIT_B can be not routed and their functionality can be replaced by a simple delay.\n\n\n## References\n - [UG380](https://www.xilinx.com/support/documentation/user_guides/ug380.pdf)\n - [XAPP502](https://www.xilinx.com/support/documentation/application_notes/xapp502.pdf)\n - [UG628](https://www.xilinx.com/support/documentation/sw_manuals/xilinx14_5/devref.pdf)\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fussserrr%2Fspartan6-mcu-configuration","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fussserrr%2Fspartan6-mcu-configuration","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fussserrr%2Fspartan6-mcu-configuration/lists"}