{"id":22812130,"url":"https://github.com/verisilicon/tim-vx","last_synced_at":"2025-05-15T17:08:16.827Z","repository":{"id":37740294,"uuid":"326910908","full_name":"VeriSilicon/TIM-VX","owner":"VeriSilicon","description":"VeriSilicon Tensor Interface Module","archived":false,"fork":false,"pushed_at":"2025-01-08T05:26:45.000Z","size":75974,"stargazers_count":232,"open_issues_count":22,"forks_count":86,"subscribers_count":15,"default_branch":"main","last_synced_at":"2025-03-31T21:45:15.447Z","etag":null,"topics":["deep-learning","neural-network","tensorflow"],"latest_commit_sha":null,"homepage":"","language":"C","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"other","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/VeriSilicon.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":"LICENSE","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null}},"created_at":"2021-01-05T06:42:29.000Z","updated_at":"2025-03-27T09:28:20.000Z","dependencies_parsed_at":"2025-01-16T17:24:56.822Z","dependency_job_id":null,"html_url":"https://github.com/VeriSilicon/TIM-VX","commit_stats":{"total_commits":504,"total_committers":39,"mean_commits":"12.923076923076923","dds":0.8531746031746031,"last_synced_commit":"149834832c381770f34351ce5b2b26d814b6dfb1"},"previous_names":[],"tags_count":15,"template":false,"template_full_name":null,"repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/VeriSilicon%2FTIM-VX","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/VeriSilicon%2FTIM-VX/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/VeriSilicon%2FTIM-VX/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/VeriSilicon%2FTIM-VX/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/VeriSilicon","download_url":"https://codeload.github.com/VeriSilicon/TIM-VX/tar.gz/refs/heads/main","host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":247737788,"owners_count":20987721,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["deep-learning","neural-network","tensorflow"],"created_at":"2024-12-12T12:10:17.979Z","updated_at":"2025-04-07T22:10:46.186Z","avatar_url":"https://github.com/VeriSilicon.png","language":"C","funding_links":[],"categories":[],"sub_categories":[],"readme":"\n\n# TIM-VX - Tensor Interface Module\n[![bazel_x86_vsim_unit_test](https://github.com/VeriSilicon/TIM-VX/actions/workflows/bazel_x86_vsim_unit_test.yml/badge.svg)](https://github.com/VeriSilicon/TIM-VX/actions/workflows/bazel_x86_vsim_unit_test.yml)\n[![cmake_x86_vsim](https://github.com/VeriSilicon/TIM-VX/workflows/cmake_x86_vsim/badge.svg)](https://github.com/VeriSilicon/TIM-VX/actions/workflows/cmake_x86_vsim.yml)\n\n- [TIM-VX - Tensor Interface Module](#tim-vx---tensor-interface-module)\n  - [Framework Support](#framework-support)\n  - [Architecture Overview](#architecture-overview)\n  - [Technical documents](#technical-documents)\n- [Get started](#get-started)\n  - [Build and Run](#build-and-run)\n    - [cmake](#cmake)\n      - [Build with local google test source](#build-with-local-google-test-source)\n      - [Build for evk-boards](#build-for-evk-boards)\n      - [Important notice for integration](#important-notice-for-integration)\n    - [Bazel](#bazel)\n  - [Other](#other)\n- [Reference board](#reference-board)\n- [Support](#support)\n\nTIM-VX is a software integration module provided by VeriSilicon to facilitate deployment of Neural-Networks on Verisilicon ML accelerators. It serves as the backend binding for runtime frameworks such as Android NN, Tensorflow-Lite, MLIR, TVM and more.\n\nMain Features\n - Over [150 operators](https://github.com/VeriSilicon/TIM-VX/blob/main/src/tim/vx/ops/README.md) with rich format support for both quantized and floating point\n - Simplified C++ binding API calls to create Tensors and Operations [Guide](https://github.com/VeriSilicon/TIM-VX/blob/main/docs/Programming_Guide.md)\n - Dynamic graph construction with support for shape inference and layout inference\n - Built-in custom layer extensions\n - A set of utility functions for debugging\n\n## Framework Support\n\n- [Tensorflow-Lite](https://github.com/VeriSilicon/tflite-vx-delegate) (External Delegate)\n- [Tengine](https://github.com/OAID/Tengine) (Official)\n- [TVM](https://github.com/VeriSilicon/tvm) (Fork)\n- [Paddle-Lite](https://github.com/PaddlePaddle/Paddle-Lite) (Official)\n- [OpenCV](https://github.com/opencv/opencv/wiki/TIM-VX-Backend-For-Running-OpenCV-On-NPU) (Offical)\n- [ONNXRuntime](https://github.com/microsoft/onnxruntime/tree/main/onnxruntime/core/providers/vsinpu) (Official)\n\nFeel free to raise a github issue if you wish to add TIM-VX for other frameworks.\n\n## Architecture Overview\n\n![TIM-VX Architecture](docs/image/timvx_overview.svg)\n\n\n## Technical documents\n*   [Add customized operator](docs/customized_op.md)\n# Get started\n\n## Build and Run\n\nTIM-VX supports both [bazel](https://bazel.build) and [cmake](https://cmake.org).\n\n----\n### cmake\n\nTo build TIM-VX for x86 with prebuilt:\n\n```shell\nmkdir host_build\ncd host_build\ncmake ..\nmake -j8\nmake install\n```\n\nAll install files (both headers and *.so) is located in : `host_build/install`\n\ncmake options:\n\n| option name | Summary | Default |\n| ----- | ----- | ----- |\n|`TIM_VX_ENABLE_TEST`| Enable unit test case for public APIs and ops | OFF |\n|`TIM_VX_ENABLE_LAYOUT_INFER`| Build with tensor data layout inference support| ON |\n|`TIM_VX_USE_EXTERNAL_OVXLIB`| Replace internal with a prebuilt libovxlib library | OFF |\n|`OVXLIB_LIB`|full path to libovxlib.so include so name, required if `TIM_VX_USE_EXTERNAL_OVXLIB`=ON | Not set |\n|`OVXLIB_INC`|ovxlib's include path, required if `TIM_VX_USE_EXTERNAL_OVXLIB`=ON| Not set |\n|`EXTERNAL_VIV_SDK`| Give external vivante openvx driver libraries | Not set|\n|`TIM_VX_BUILD_EXAMPLES`| Build example applications | OFF |\n|`TIM_VX_ENABLE_40BIT` | Enable large memory (over 4G) support in NPU driver | OFF |\n|`TIM_VX_ENABLE_PLATFORM` | Enable multi devices support | OFF |\n|`TIM_VX_ENABLE_PLATFORM_LITE` | Enable lite multi-device support, only work when `TIM_VX_ENABLE_PLATFORM`=ON | OFF |\n|`VIP_LITE_SDK` | full path to VIPLite sdk, required when `TIM_VX_ENABLE_PLATFORM_LITE`=ON | Not set |\n|`TIM_VX_ENABLE_GRPC` | Enable gPRC support, only work when `TIM_VX_ENABLE_PLATFORM`=ON | OFF |\n|`TIM_VX_DBG_ENABLE_TENSOR_HNDL` | Enable built-in tensor from handle | ON |\n|`TIM_VX_ENABLE_TENSOR_CACHE` | Enable tensor cache for const tensor, check [OpenSSL build notes](docs/openssl_build.md) | OFF |\n\n----\nRun unit test:\n\n```shell\ncd host_build/src/tim\n\nexport LD_LIBRARY_PATH=`pwd`/../../../prebuilt-sdk/x86_64_linux/lib:\u003cpath to libgtest_main.so\u003e:$LD_LIBRARY_PATH\nexport VIVANTE_SDK_DIR=`pwd`/../../../prebuilt-sdk/x86_64_linux/\nexport VSIMULATOR_CONFIG=\u003chardware name should get from chip vendor\u003e\n# if you want to debug wit gdb, please set\nexport DISABLE_IDE_DEBUG=1\n./unit_test\n```\n\n#### Build with local google test source\n```shell\n    cd \u003cwksp_root\u003e\n    git clone --depth 1 -b release-1.10.0 git@github.com:google/googletest.git\n\n    cd \u003croot_tim_vx\u003e/build/\n    cmake ../ -DTIM_VX_ENABLE_TEST=ON -DFETCHCONTENT_SOURCE_DIR_GOOGLETEST=\u003cwksp_root/googletest\u003e \u003cadd other cmake define here\u003e\n```\n\n----\n#### Build for evk-boards\n\n1. prepare toolchain file follow cmake standard\n2. make sure cross build low-level driver with toolchain separately, we need the sdk from the low-level driver\n3. add ```-DEXTERNAL_VIV_SDK=\u003clow-level-driver/out/sdk\u003e``` to cmake definitions, also remember ```-DCMAKE_TOOLCHAIN_FILE=\u003cToolchain_Config\u003e```\n4. or for using a buildroot toolchain with extrnal VIV-SDK add:\n   ```cmake\n   -DCONFIG=BUILDROOT -DCMAKE_SYSROOT=${CMAKE_SYSROOT} -DEXTERNAL_VIV_SDK=${BUILDROOT_SYSROOT}\n   ```\n5. then make\n\n----\n#### Important notice for integration\nIf you want to build tim-vx as a static library, and link it to your shared library or application, please be carefull with the linker, \"-Wl,--whole-archive\" is required.\n\n@see **samples/lenet/CMakeLists.txt** for reference\n\n### Bazel\n\n[Install bazel](https://docs.bazel.build/versions/master/install.html) to get started.\n\nTIM-VX needs to be compiled and linked against VeriSilicon OpenVX SDK which provides related header files and pre-compiled libraries. A default linux-x86_64 SDK is provided which contains the simulation environment on PC. Platform specific SDKs can be obtained from respective SoC vendors.\n\nTo build TIM-VX:\n\n```shell\nbazel build libtim-vx.so\n```\n\nTo run sample LeNet:\n\n```shell\n# set VIVANTE_SDK_DIR for runtime compilation environment\nexport VIVANTE_SDK_DIR=`pwd`/prebuilt-sdk/x86_64_linux\n\nbazel build //samples/lenet:lenet_asymu8_cc\nbazel run //samples/lenet:lenet_asymu8_cc\n```\n\n## Other\n\nTo build and run Tensorflow-Lite with TIM-VX, please see [README](https://github.com/VeriSilicon/tflite-vx-delegate#readme)\n\nTo build and run TVM with TIM-VX, please see [TVM README](https://github.com/VeriSilicon/tvm/blob/vsi_npu/README.VSI.md)\n\n# Reference board\n\nChip | Vendor | References | Success Stories |\n:------    |:----- |:------ |:------\ni.MX 8M Plus | NXP | [ML Guide](https://www.nxp.com.cn/docs/en/user-guide/IMX-MACHINE-LEARNING-UG.pdf), [BSP](https://www.nxp.com/design/software/embedded-software/i-mx-software/embedded-linux-for-i-mx-applications-processors:IMXLINUX?tab=Design_Tools_Tab) | [SageMaker with 8MP](https://docs.aws.amazon.com/sagemaker/latest/dg/neo-supported-devices-edge.html)\nA311D | Khadas - VIM3 | [A311D datasheet](https://dl.khadas.com/Hardware/VIM3/Datasheet/A311D_Quick_Reference_Manual_01_Wesion.pdf), [BSP](https://dl.khadas.com/Firmware/VIM3/Ubuntu/EMMC/VIM3_Ubuntu-server-focal_Linux-4.9_arm64_EMMC_V0.9-20200530.7z) | [Paddle-lite demo](https://github.com/PaddlePaddle/Paddle-Lite/blob/develop/docs/demo_guides/verisilicon_timvx.md)\nS905D3 | Khadas - VIM3L | [S905D3](https://dl.khadas.com/Hardware/VIM3/Datasheet/S905D3_datasheet_0.2_Wesion.pdf) , [BSP](https://dl.khadas.com/Firmware/VIM3L/Ubuntu/EMMC/VIM3L_Ubuntu-server-focal_Linux-4.9_arm64_EMMC_V0.9-20200530.7z)\n\n# Support\nCreate issue on github or email to ML_Support at verisilicon dot com\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fverisilicon%2Ftim-vx","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fverisilicon%2Ftim-vx","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fverisilicon%2Ftim-vx/lists"}