{"id":13633413,"url":"https://github.com/vhdl/awesome-vhdl","last_synced_at":"2025-04-18T10:34:51.339Z","repository":{"id":104199920,"uuid":"128547713","full_name":"VHDL/awesome-vhdl","owner":"VHDL","description":"A curated list of awesome VHDL IP cores, frameworks, libraries, software and resources.","archived":true,"fork":false,"pushed_at":"2020-02-08T18:48:55.000Z","size":21,"stargazers_count":74,"open_issues_count":3,"forks_count":5,"subscribers_count":23,"default_branch":"master","last_synced_at":"2024-05-19T03:33:52.289Z","etag":null,"topics":["awesome","collection","vhdl","vhdl-collection","vhdl-ip-core","vhdl-library"],"latest_commit_sha":null,"homepage":"http://vhdl.net/","language":null,"has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"cc0-1.0","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/VHDL.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":"CONTRIBUTING.md","funding":null,"license":"LICENSE.md","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null}},"created_at":"2018-04-07T16:36:32.000Z","updated_at":"2024-03-08T18:34:47.000Z","dependencies_parsed_at":null,"dependency_job_id":"8514c61b-9e45-4819-8ac7-c7609902b0e4","html_url":"https://github.com/VHDL/awesome-vhdl","commit_stats":null,"previous_names":[],"tags_count":0,"template":false,"template_full_name":null,"repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/VHDL%2Fawesome-vhdl","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/VHDL%2Fawesome-vhdl/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/VHDL%2Fawesome-vhdl/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/VHDL%2Fawesome-vhdl/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/VHDL","download_url":"https://codeload.github.com/VHDL/awesome-vhdl/tar.gz/refs/heads/master","host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":249479060,"owners_count":21279188,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["awesome","collection","vhdl","vhdl-collection","vhdl-ip-core","vhdl-library"],"created_at":"2024-08-01T23:00:39.278Z","updated_at":"2025-04-18T10:34:51.319Z","avatar_url":"https://github.com/VHDL.png","language":null,"funding_links":[],"categories":["Uncategorized","Awesome List"],"sub_categories":["Uncategorized"],"readme":"[![CC0 - Public Domain](https://img.shields.io/github/license/vhdl/awesome-vhdl.svg)](https://github.com/VHDL/awesome-vhdl/blob/master/LICENSE.md)\n[![Awesome](https://awesome.re/badge.svg)](https://awesome.re)\n\n--------------------------------------------------------------------------------\n\n# Awesome VHDL\n\nA curated list of awesome VHDL IP cores, frameworks, libraries, software and related resources.\n\n\n**Table of content:**\n\n- [Libraries](#libraries)\n    - [IP Core Libraries](#ip-core-libraries)\n    - [IP Core Collections](#ip-core-collections)\n- [IP Cores](#ip-cores)\n- [Frameworks](#frameworks)\n    - [Verification Frameworks](#verification-frameworks)\n- [Verification Models](#verification-models)\n    - [Memory Models](#memory-models)\n    - [Interface Models](#interface-models)\n- [Tools](#tools)\n    - [Grammars](#grammers)\n    - [Parsers](#parsers)\n    - [Simulators](#simulators)\n    - [Package Managers](#package-managers)\n- [Services](#services)\n    - [Code Quality](#code-quality)\n    - [Continuous Integration](#continuous-integration)\n    - [Continuous Documentation](#continuous-documentation)\n- [Resources](#resources)\n    - [Books](#books)\n    - [Podcasts](#podcasts)\n    - [Twitter](#twitter)\n    - [Websites](#websites)\n    - [Weekly](#weekly)\n- [Other Awesome Lists](#other-awesome-lists)\n- [Contributing](#contributing)\n\n\n--------------------------------------------------------------------------------\n\n# Libraries\n\n## IP Core Libraries\n\n*Libraries containing multiple IP cores.*\n\n* [The PoC-Library](https://github.com/VLSI-EDA/PoC) - A library of free, open-source and platform independent IP cores.\n\n\n\n\n## IP Core Collections\n\n*Collections containing multiple IP cores.*\n\n\n\n\n# IP Cores\n\n*Single IP cores.*\n\n\n\n\n# Frameworks\n\n## Verification Frameworks\n\n*Frameworks for Verification.*\n\n* [Open Source VHDL Verification Methodology (OSVVM)](https://github.com/OSVVM/OSVVM)\n* [Universal VHDL Verification Methodology (UVVM)](https://github.com/UVVM/UVVM)\n\n\n\n\n# Verification Models\n\n*Single verification models.*\n\n## Memory Models\n\n*Verification Model for Memories*\n\n\n\n## Interface Models\n\n*Verification Model for Interfaces.*\n\n\n\n# Tools\n\n## Grammars\n\n\n\n\n## Parsers\n\n\n## Simulators\n\n* [GHDL](https://github.com/ghdl/ghdl) - A free and open source VHDL simulator supporting VHDL-87/93/2002/2008.\n\n\n## Package Managers\n\n\n\n\n# Services\n\n## Code Quality\n\n\n## Continuous Integration\n\n\n## Continuous Documentation\n\n\n\n\n# Resources\n\n## Books\n\n\n## Twitter\n\n\n## Websites\n\n\n## Weekly\n\n\n\n\n# Other Awesome Lists\n\n*List of lists.*\n\n* [awesome](https://github.com/sindresorhus/awesome)\n* [awesome-hdl](https://github.com/drom/awesome-hdl)\n\n\n\n\n# Contributing\n\nYour contributions are always welcome! Please take a look at the [contribution guidelines](https://github.com/vhdl/awesome-vhdl/blob/master/CONTRIBUTING.md) first.\n\nI will keep some pull requests open if I'm not sure whether those libraries are\nawesome, you could [vote for them](https://github.com/vhdl/awesome-vhdl/pulls)\nby adding :+1: to them. Pull requests will be merged when their votes reach **10**.\n\n\n\n\n# License\n\n[Creative Commons](https://creativecommons.org/) - [CC0 1.0 Universal (CC0 1.0)](https://creativecommons.org/publicdomain/zero/1.0/deed)\n\n\n--------------------------------------------------------------------------------\n\nIf you have any question about this opinionated list, do not hesitate to contact\nme [@PaebbelsLemmi](https://twitter.com/PaebbelsLemmi) on Twitter or open an [issue](https://github.com/VHDL/awesome-vhdl/issues/new)\non GitHub.\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fvhdl%2Fawesome-vhdl","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fvhdl%2Fawesome-vhdl","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fvhdl%2Fawesome-vhdl/lists"}