{"id":27695138,"url":"https://github.com/vishalsharma0309/hack_computer","last_synced_at":"2025-04-25T14:16:58.744Z","repository":{"id":56680057,"uuid":"262226328","full_name":"VishalSharma0309/hack_computer","owner":"VishalSharma0309","description":"Building 'Hack' computer from ground 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The 'Hack' Computer\n\n### Objective\nTo build a computer from the absolute basic logical gate- NAND for all combinational chips and D Flip-Flop for all sequential chips. \n\n### Technical Specification of 'Hack'\n\n\n### General Architechture of 'Hack'\n\n\n\n### Setting Up\n\n#### Simulation Tools\n\n### Project Structure\n\n\n    ''' \n    hack_computer\n    │   README.md\n    │\n    └───01\n    │   |   And: .hdl, .tst, .out, .cmp    \n    |   |   And16: .hdl, .tst, .out, .cmp  \n    |   |   DMux: .hdl, .tst, .out, .cmp  \n    |   |   DMux4Way: .hdl, .tst, .out, .cmp  \n    |   |   DMux8Way: .hdl, .tst, .out, .cmp  \n    |   |   Mux: .hdl, .tst, .out, .cmp  \n    |   |   Mux4Way16: .hdl, .tst, .out, .cmp  \n    |   |   Mux8Way16: .hdl, .tst, .out, .cmp  \n    |   |   Mux16: .hdl, .tst, .out, .cmp  \n    |   |   Not: .hdl, .tst, .out, .cmp  \n    |   |   Not16: .hdl, .tst, .out, .cmp  \n    |   |   Or: .hdl, .tst, .out, .cmp  \n    |   |   Or8Way: .hdl, .tst, .out, .cmp  \n    |   |   Or16: .hdl, .tst, .out, .cmp  \n    |   |   Xor: .hdl, .tst, .out, .cmp  \n    |\n    └───02\n    │   │   Add16: .cmo, .hdl, .out, .tst\n    |   |   ALU: .cmp, .hdl, .out, .tst\n    |   |   ALU-nostat: .cmp, .tst\n    |   |   FullAdder: .cmp, .out, .tst\n    |   |   HalfAdder: .cmp, .hdl, .out, .tst\n    |   |   Inc16: .cmp, .hdl, .out, .tst\n    |   |   Or16Way: .hdl\n    |\n    └───03\n    |   |   Bit: .cmp, .hdl, .out, .tst\n    |   |   PC: .cmp, .hdl, .out, .tst\n    |   |   RAM4K: .cmp, .hdl, .out, .tst\n    |   |   RAM8: .cmp, .hdl, .out, .tst\n    |   |   RAM16K: .cmp, .hdl, .out, .tst\n    |   |   RAM64: .cmp, .hdl, .out, .tst\n    |   |   RAM512: .cmp, .hdl, .out, .tst\n    |   |   Register: .cmp, .hdl, .out, .tst\n    |\n    └───04\n    |   |   Computer: .cmp, .hdl, .out, .tst\n    |   |   ComputerAdd: .cmp, .hdl, .out, .tst\n    |   |   ComputerAdd-external: .cmp, .hdl, .out, .tst\n    |   |   ComputerMax: .cmp, .hdl, .out, .tst\n    |   |   ComputerMax-external: .cmp, .hdl, .out, .tst\n    |   |   ComputerRect: .cmp, .hdl, .out, .tst\n    |   |   ComputerRect-external: .cmp, .hdl, .out, .tst\n    |   |   CPU: .cmp, .hdl, .out, .tst\n    |   |   CPU-external: .cmp, .hdl, .out, .tst\n    |   |   Memory: .cmp, .hdl, .out, .tst\n    |\n    └───05\n    |   |   Add: .asm, .hack\n    |   |   Assembler.py\n    |   |   Makefile\n    |   |   Max: .asm, .hack\n    |   |   MaxL: .asm, .hack\n    |   |   Pong: .asm, .hack\n    |   |   PongL: .asm, .hack\n    |   |   README\n    |   |   Rect: .asm, .hack\n    |   |   RectL: .asm, .hack\n    |   |   test6.sh\n    |\n    └───tools\n    |   |   Assembler: .bat, .sh\n    |   |   CPUEmulator: .bat, .sh\n    |   |   HardwareSimulator: .bat, .sh\n    |   |   JackCompiler: .bat, .sh\n    |   |   TextComparer: .bat, .sh\n    |   |   VMEmulator: .bat, .sh\n    |   |   Noam Nisan, Shimon Schocken - The Elements of Computing Systems_ Building a Modern Computer from First Principles-The MIT Press (2005).pdf\n    |   \n    |   └───bin\n    |   └───builtInChips\n    |   └───builtInVMCode\n    |   └───OS\n    '''\n\n\n### Hardware Description Language (HDL)\n\n* HDL is a **functional/declarative** language \n* Order of HDL statements is **insignificant**\n* Only prerequisite to use a build-in/user-defined chip is the knowledge of its **interface**\n\nAn HDL definition of a chip consists of a **header section** and a **parts section**.  \u003cbr\u003e\nThe **header section** specifies the chip interface, namely the chip name and the names of its input and output pins. \u003cbr\u003e\nThe **parts section** describes the names and topology of all the lower-level parts (other chips) from which this chip is constructed. Each part is represented by a statement that specifies the part name and the way it is connected to other parts in the design.\n\n#### Testing\n\n1. Manual Testing\n2. Script Testing\n\nThe script lists a series of testing scenarios, designed to simulate the various contingencies under which the chip will have to operate in ‘‘real-life’’ situations.\u003cbr\u003e\n\nThe script instructs the simulator to bind the chip inputs to certain data values, compute the resulting output, and record the test results in a designated output file.\n\n### 'Hack' Assembbly Language\n\n\n### 'Hack' Arithmetic Logic Unit (ALU)\n\n\n### Memory Units\n\n#### Bit\n\n#### Register\n\n#### Counter\n\n\n### Interfacing (Input Output)\n\n#### Output Device- **Screen**\n\n#### Input Device- **Keyboard**\n\n\n### CPU Architechture of 'Hack'\n\n\n### References\n1. Digital Logic and Computer Design- M. Morris Mano\n2. The Elements of Computing Systems- Noam Nisan and Shimon Schocken\n\n\n\n\n\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fvishalsharma0309%2Fhack_computer","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fvishalsharma0309%2Fhack_computer","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fvishalsharma0309%2Fhack_computer/lists"}