{"id":48538491,"url":"https://github.com/widgetii/orangepi5plus-npu","last_synced_at":"2026-04-08T03:08:41.689Z","repository":{"id":346795986,"uuid":"1190521209","full_name":"widgetii/orangepi5plus-npu","owner":"widgetii","description":"Open-source reverse engineering of the Rockchip RK3588 NPU — standalone driver, Mesa patches, QEMU emulator","archived":false,"fork":false,"pushed_at":"2026-04-03T12:22:12.000Z","size":1588,"stargazers_count":0,"open_issues_count":1,"forks_count":0,"subscribers_count":0,"default_branch":"master","last_synced_at":"2026-04-03T17:12:46.099Z","etag":null,"topics":[],"latest_commit_sha":null,"homepage":null,"language":"C","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":null,"status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/widgetii.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":null,"code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null,"zenodo":null,"notice":null,"maintainers":null,"copyright":null,"agents":null,"dco":null,"cla":null}},"created_at":"2026-03-24T11:12:52.000Z","updated_at":"2026-04-03T12:22:16.000Z","dependencies_parsed_at":null,"dependency_job_id":null,"html_url":"https://github.com/widgetii/orangepi5plus-npu","commit_stats":null,"previous_names":["widgetii/orangepi5plus-npu"],"tags_count":0,"template":false,"template_full_name":null,"purl":"pkg:github/widgetii/orangepi5plus-npu","repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/widgetii%2Forangepi5plus-npu","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/widgetii%2Forangepi5plus-npu/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/widgetii%2Forangepi5plus-npu/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/widgetii%2Forangepi5plus-npu/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/widgetii","download_url":"https://codeload.github.com/widgetii/orangepi5plus-npu/tar.gz/refs/heads/master","sbom_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/widgetii%2Forangepi5plus-npu/sbom","scorecard":null,"host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":286080680,"owners_count":31537849,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2026-04-07T16:28:08.000Z","status":"online","status_checked_at":"2026-04-08T02:00:06.127Z","response_time":54,"last_error":null,"robots_txt_status":"success","robots_txt_updated_at":"2025-07-24T06:49:26.215Z","robots_txt_url":"https://github.com/robots.txt","online":true,"can_crawl_api":true,"host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":[],"created_at":"2026-04-08T03:08:40.617Z","updated_at":"2026-04-08T03:08:41.678Z","avatar_url":"https://github.com/widgetii.png","language":"C","funding_links":[],"categories":[],"sub_categories":[],"readme":"# RK3588 NPU Research — Orange Pi 5 Plus\n\n[![CI](https://github.com/widgetii/orangepi5plus-npu/actions/workflows/ci.yml/badge.svg)](https://github.com/widgetii/orangepi5plus-npu/actions/workflows/ci.yml)\n\nOpen-source reverse engineering of the Rockchip RK3588 Neural Processing Unit.\nThis project includes a standalone NPU driver (`librocketnpu`), Mesa Gallium\noptimization patches, a QEMU emulator for the NPU hardware, and research into\nthe proprietary RKNN register programming model.\n\n## Project Components\n\n### librocketnpu — Standalone Open-Source NPU Driver\n\nA zero-dependency C library that drives the RK3588 NPU directly via DRM IOCTLs,\nwithout Mesa or the proprietary RKNN stack.\n\n```\nlibrocketnpu/\n  src/\n    rnpu_tflite.c    # TFLite FlatBuffer parser (zero deps)\n    rnpu_onnx.c      # ONNX protobuf parser (protobuf-c)\n    rnpu_model.c     # Graph analysis, per-channel grouping, scheduling\n    rnpu_task.c      # CBUF bank allocation, spatial tiling\n    rnpu_coefs.c     # Weight/bias quantization formatting\n    rnpu_regcmd.c    # Hardware register command generation\n    rnpu_drm.c       # DRM IOCTL submission (CREATE_BO, SUBMIT)\n    rnpu_rknn.c      # RKNN binary parser (BRDMA extraction)\n    rnpu_sw_ops.c    # CPU fallback: concat, maxpool, pad, resize, sigmoid, softmax\n    rnpu_convert.c   # NPU tensor format conversion (NHWC \u003c-\u003e NCHW interleaved)\n  include/\n    rocketnpu.h      # Public C API\n  tests/\n    test_sw_ops.c    # 27 unit tests (CPU-only, no hardware)\n    test_rknpu_abi.c # 29 ABI regression tests (CPU-only)\n    test_onnx_parse.c # ONNX parser validation\n  docs/\n    compiler_architecture.md  # Research: open-source NPU compiler design\n```\n\n**Features:**\n- Loads TFLite INT8 models directly — no conversion step\n- ONNX frontend (protobuf-c) for RKNN-toolkit graph consumption\n- Dual-driver: supports both Rocket (mainline) and RKNPU (vendor) kernel drivers\n- Per-channel quantization via scale-sorted grouping + BRDMA DMA\n- Multi-task batching for cross-operation chaining\n- 56 unit tests, CI on GitHub Actions\n\n**Build:**\n```bash\n# On board (aarch64, Armbian)\napt install libdrm-dev\ncd librocketnpu \u0026\u0026 make\n\n# With ONNX support\napt install libprotobuf-c-dev\nmake test_onnx_parse\n\n# Run tests (no hardware needed)\nmake test\n```\n\n### Mesa Optimization Patches\n\nPerformance patches for the upstream Rocket Gallium driver:\n\n| Patch | Description | Impact |\n|-------|-------------|--------|\n| `0003` | BO pool, cache sync reduction, NEON I/O conversion, cached submit | 12% avg latency reduction |\n| `0004` | SW ops: concat, maxpool, pad, resize, logistic | YOLO mixed HW/SW execution |\n| `0005` | Fix INT8 regression: batch tasks per operation | Correctness fix for upstream |\n\n### QEMU NPU Emulator\n\nFull-system emulation of the RK3588 NPU for development without hardware:\n- Boots unmodified Armbian disk images\n- Emulates CRU (Clock Reset Unit) for kernel driver probe\n- NPU MMIO register model (PC, CNA, Core units)\n- IOMMU stub for DMA address translation\n\n## Benchmark Results\n\n### MobileNetV1 224x224 INT8 (single core)\n\n| Stack | Latency | Status |\n|-------|---------|--------|\n| RKNN proprietary (vendor kernel) | **2.6ms** | Bit-exact |\n| librocketnpu (vendor kernel, BRDMA) | **10.2ms** | Bit-exact (max_diff=0) |\n| Mesa Rocket + patches (mainline kernel) | **10.2ms** | Bit-exact |\n| Mesa Rocket stock (mainline kernel) | 11.6ms | Bit-exact |\n\n### YOLOv5s-relu 640x640 INT8\n\n| Stack | Latency | Accuracy vs RKNN golden |\n|-------|---------|------------------------|\n| RKNN proprietary (3 cores) | **9.5ms** | Reference |\n| RKNN simulator (x86, ONNX Runtime) | N/A | ~0.2 mean diff |\n| librocketnpu (vendor, per-channel groups) | **292ms** | ~18-25 mean diff |\n\nThe accuracy gap is due to per-channel quantization hardware limitations — the\nNVDLA-derived CNA applies one requantization scale per operation, while YOLO's\nper-axis weights need per-channel scaling. librocketnpu approximates this with\nscale-sorted channel grouping and BRDMA MUL correction.\n\n## NPU Hardware Architecture\n\nThe RK3588 NPU has **3 independent cores** (6 TOPS total), each with:\n\n| Offset | Unit | Function |\n|--------|------|----------|\n| +0x0000 | PC (Frontend) | DMA engine: reads register command buffers, writes to CNA |\n| +0x1000 | CNA | Convolution Neural Accelerator (INT8 MAC array) |\n| +0x2000 | DPU + RDMA | Data Processing: bias, batch norm, element-wise, output quantization |\n| +0x3000 | Core | Power, clock, interrupt control |\n\nThe NPU is **register-programmed** — no instruction set. Each \"instruction\" is a\n`(register_address, value)` pair packed into 64-bit entries, DMA'd from memory by\nthe PC unit. A typical convolution requires ~130 register writes across CNA, DPU,\nand RDMA units.\n\n## Research Documents\n\n| Document | Description |\n|----------|-------------|\n| [`librocketnpu/docs/compiler_architecture.md`](librocketnpu/docs/compiler_architecture.md) | Open-source NPU compiler design (ONNC, TVM, MLIR comparison) |\n| [`optimization_report.md`](optimization_report.md) | Mesa Rocket driver optimizations (12% latency reduction) |\n| [`rocket_ioctl_analysis.md`](rocket_ioctl_analysis.md) | Decoded IOCTL protocols for Rocket and RKNPU drivers |\n| [`npu_research_report.md`](npu_research_report.md) | Full research report: architecture, ftrace, driver comparison |\n| [`per_axis_quantization_research.md`](per_axis_quantization_research.md) | Per-channel quantization hardware investigation |\n\n## Board Setup\n\n| | |\n|---|---|\n| Board | Orange Pi 5 Plus (RK3588, 16GB LPDDR4X, 233GB eMMC) |\n| OS | Armbian 25.11.1 Noble (Ubuntu 24.04) |\n| Kernels | 6.18.10-current-rockchip64 (mainline) / 6.1.115-vendor-rk35xx (vendor) |\n\n## License\n\nlibrocketnpu: MIT. Research documents and patches: as noted per file.\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fwidgetii%2Forangepi5plus-npu","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fwidgetii%2Forangepi5plus-npu","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fwidgetii%2Forangepi5plus-npu/lists"}