{"id":31815755,"url":"https://github.com/xilinx/vitis_accel_examples","last_synced_at":"2026-02-18T05:01:53.748Z","repository":{"id":37789224,"uuid":"214885806","full_name":"Xilinx/Vitis_Accel_Examples","owner":"Xilinx","description":"Vitis_Accel_Examples","archived":false,"fork":false,"pushed_at":"2025-08-15T21:12:05.000Z","size":112140,"stargazers_count":559,"open_issues_count":10,"forks_count":220,"subscribers_count":22,"default_branch":"main","last_synced_at":"2025-10-11T09:25:43.773Z","etag":null,"topics":["acap","alveo","fpga-programming","soc","vitis","xilinx","zynq"],"latest_commit_sha":null,"homepage":"http://xilinx.github.io/Vitis_Accel_Examples/","language":"Makefile","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"mit","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/Xilinx.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":"CONTRIBUTING.md","funding":null,"license":"LICENSE.txt","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null,"zenodo":null,"notice":null,"maintainers":null,"copyright":null,"agents":null,"dco":null,"cla":null}},"created_at":"2019-10-13T20:04:24.000Z","updated_at":"2025-10-10T00:09:22.000Z","dependencies_parsed_at":"2023-01-30T18:01:19.412Z","dependency_job_id":"58a6e167-2f24-4194-9898-fce99846187a","html_url":"https://github.com/Xilinx/Vitis_Accel_Examples","commit_stats":null,"previous_names":[],"tags_count":7,"template":false,"template_full_name":null,"purl":"pkg:github/Xilinx/Vitis_Accel_Examples","repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/Xilinx%2FVitis_Accel_Examples","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/Xilinx%2FVitis_Accel_Examples/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/Xilinx%2FVitis_Accel_Examples/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/Xilinx%2FVitis_Accel_Examples/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/Xilinx","download_url":"https://codeload.github.com/Xilinx/Vitis_Accel_Examples/tar.gz/refs/heads/main","sbom_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/Xilinx%2FVitis_Accel_Examples/sbom","scorecard":null,"host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":286080680,"owners_count":29569853,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2026-02-18T04:18:28.490Z","status":"ssl_error","status_checked_at":"2026-02-18T04:13:49.018Z","response_time":162,"last_error":"SSL_connect returned=1 errno=0 peeraddr=140.82.121.5:443 state=error: unexpected eof while reading","robots_txt_status":"success","robots_txt_updated_at":"2025-07-24T06:49:26.215Z","robots_txt_url":"https://github.com/robots.txt","online":false,"can_crawl_api":true,"host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["acap","alveo","fpga-programming","soc","vitis","xilinx","zynq"],"created_at":"2025-10-11T09:23:49.372Z","updated_at":"2026-02-18T05:01:53.743Z","avatar_url":"https://github.com/Xilinx.png","language":"Makefile","funding_links":[],"categories":[],"sub_categories":[],"readme":"\u003ctable width=\"100%\"\u003e\n \u003ctr width=\"100%\"\u003e\n    \u003ctd align=\"center\"\u003e\u003cimg src=\"https://raw.githubusercontent.com/Xilinx/Image-Collateral/main/xilinx-logo.png\" width=\"30%\"/\u003e\u003ch1\u003eVitis™ Data Center Acceleration Examples\u003c/h1\u003e\n    \u003c/td\u003e\n \u003c/tr\u003e\n\u003c/table\u003e\n\nWelcome to the Vitis Data Center Acceleration Examples repository. This repository contains examples to showcase various features of the Vitis™ tools targeting Alveo Data Center platforms. It is expected that users have gone through the [Vitis HLS Introductory Examples](https://github.com/Xilinx/Vitis-HLS-Introductory-Examples) and [Vitis Tutorials](https://github.com/Xilinx/Vitis-Tutorials) and have developed a basic understanding of the tools and the programming model. This repository illustrates specific scenarios related to host code and kernel programming through small working examples. The intention is for users to be able to use these working examples as a reference while developing their own accelerator application based on AMD Alveo platforms. \n\n## Brief description of the examples\n| Example | Description |\n|-|-|\n| host_xrt | XRT Native APIs examples for optimal host-kernel interaction with AMD Devices |\n| performance |Examples that cover performance related aspects for kernel-to-memory, host-to-kernel and host-to-memory |\n| rtl_kernels |RTL Kernels based examples covering mix of RTL and HLS C++ kernels and hardware debug in Vitis flow |\n| sys_opt | Examples covering multiple devices, multiple processes and kernel swap use cases |\n\nFor more comprehensive documentation, \u003ca href=\"http://xilinx.github.io/Vitis_Accel_Examples/\"\u003e\u003cimg src=\"https://img.shields.io/badge/click-here-green?style=plastic\u0026logo=appveyor\"/\u003e\u003c/a\u003e\n\n\n\u003cp class=\"sphinxhide\" align=\"center\"\u003e\u003csub\u003eCopyright © 2020–2025 Advanced Micro Devices, Inc\u003c/sub\u003e\u003c/p\u003e\n\n\u003cp class=\"sphinxhide\" align=\"center\"\u003e\u003csup\u003e\u003ca href=\"https://www.amd.com/en/corporate/copyright\"\u003eTerms and Conditions\u003c/a\u003e\u003c/sup\u003e\u003c/p\u003e\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fxilinx%2Fvitis_accel_examples","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fxilinx%2Fvitis_accel_examples","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fxilinx%2Fvitis_accel_examples/lists"}