{"id":28824307,"url":"https://github.com/xtra-computing/dsp_cam","last_synced_at":"2026-02-15T00:31:33.661Z","repository":{"id":285682115,"uuid":"957986185","full_name":"Xtra-Computing/DSP_CAM","owner":"Xtra-Computing","description":"DSP_CAM project (accepted by DAC2025)","archived":false,"fork":false,"pushed_at":"2025-04-09T02:31:52.000Z","size":1907,"stargazers_count":4,"open_issues_count":0,"forks_count":1,"subscribers_count":7,"default_branch":"master","last_synced_at":"2025-08-13T05:25:10.238Z","etag":null,"topics":[],"latest_commit_sha":null,"homepage":"","language":"Python","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":null,"status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/Xtra-Computing.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":"CONTRIBUTING.md","funding":null,"license":null,"code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null}},"created_at":"2025-03-31T13:08:37.000Z","updated_at":"2025-08-07T11:15:26.000Z","dependencies_parsed_at":"2025-04-02T05:36:03.966Z","dependency_job_id":null,"html_url":"https://github.com/Xtra-Computing/DSP_CAM","commit_stats":null,"previous_names":["xtra-computing/dsp_cam"],"tags_count":0,"template":false,"template_full_name":null,"purl":"pkg:github/Xtra-Computing/DSP_CAM","repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/Xtra-Computing%2FDSP_CAM","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/Xtra-Computing%2FDSP_CAM/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/Xtra-Computing%2FDSP_CAM/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/Xtra-Computing%2FDSP_CAM/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/Xtra-Computing","download_url":"https://codeload.github.com/Xtra-Computing/DSP_CAM/tar.gz/refs/heads/master","sbom_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/Xtra-Computing%2FDSP_CAM/sbom","scorecard":null,"host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":286080680,"owners_count":29461911,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2026-02-14T22:42:09.113Z","status":"ssl_error","status_checked_at":"2026-02-14T22:42:05.053Z","response_time":53,"last_error":"SSL_read: unexpected eof while reading","robots_txt_status":"success","robots_txt_updated_at":"2025-07-24T06:49:26.215Z","robots_txt_url":"https://github.com/robots.txt","online":false,"can_crawl_api":true,"host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":[],"created_at":"2025-06-19T01:07:38.447Z","updated_at":"2026-02-15T00:31:33.646Z","avatar_url":"https://github.com/Xtra-Computing.png","language":"Python","readme":"# Configurable DSP-Based CAM on FPGAs\n\n## Overview\n\nThis project implements a **Configurable DSP-Based Content Addressable Memory (CAM) Architecture** tailored for FPGA platforms. The architecture emphasizes **scalability**, **efficiency**, and **multi-query support**, optimized for applications in **graph analytics** and **databases**.\n\n---\n\n## Features\n\n- **Hierarchical Design**:\n  - **CAM Cell**: Utilizes FPGA DSP slices for efficient storage and comparison operations.\n  - **CAM Block**: Supports rapid search and update operations across multiple CAM cells.\n  - **CAM Unit**: Manages multiple CAM blocks, facilitating larger data spaces and concurrent searches.\n- **Scalability**: Highly parameterizable design to maximize DSP resource utilization.\n- **Efficiency**: Optimized search and update performance.\n- **Multi-query Support**: Enables concurrent searches, maximizing throughput and memory efficiency.\n- **Real-world Applications**: Ideal for graph-based analytics, notably triangle counting.\n\n---\n\n## Project Structure\n\nProject structure\n\n```\nDSP_CAM/\n├── CAMUnit/                 # The CAM unit design and CAM block design, together with the testing project files\n├── TriangleCount/           # The triangle counting application with our CAM unit and user-defined kernels\n├── common/                  # The common folder for a Vitis project\n├── figure/                  # Repository figures\n├── CONTRIBUTING.md\n└── README.md\n```\n\nThe project comprises two main parts:\n\n1. **CAM Unit Customization** (`CAMUnit`): Contains `cam_block` and `cam_unit` designs.\n   - Each folder includes:\n     - **`param.cfg`**: Configuration file for architectural parameters.\n     - **`configure.sh`**: Script to auto-generate source files based on provided parameters.\n     - **`template`**: Templates for module code generation.\n\n2. **Triangle Counting Accelerator** (`TriangleCount`): Application built using the CAM Unit.\n\n---\n\n## Getting Started\n\n### Step 1: Configure Parameters\n\nEdit `param.cfg` to define CAM architecture settings:\n\n```cfg\nCUSTOMIZED_BUS_WIDTH=520\nCUSTOMIZED_CAM_SIZE=128\nCUSTOMIZED_ALUMODE=4'b0100\nCUSTOMIZED_OPMODE=9'b000110011\nCUSTOMIZED_MASK=48'h0\nCUSTOMIZED_ENCODE_SCHEME=PRIORITY_ENCODE\n```\n\nThen run the configuration script:\n\n```bash\n./configure.sh\n```\n\n### Step 2: Compilation\n\nSet up your environment:\n\n```bash\nsource /opt/xilinx/xrt/setup.sh\nsource /YOUR_PATH/Vitis/2022.2/settings64.sh  # Update with your Vitis path\n```\n\nCompile the project using `make`:\n\n```bash\nmake all TARGET=\u003chw_emu/hw\u003e PLATFORM=\u003cplatform_path\u003e\n```\n\n**Example:**\n\n```bash\nmake all TARGET=hw_emu PLATFORM=/opt/xilinx/platforms/xilinx_u250_gen3x16_xdma_3_1_202020_1/xilinx_u250_gen3x16_xdma_3_1_202020_1.xpfm\n```\n\n### Step 3: Running the Application\n\nRun the executable with:\n\n```bash\n./executable -x \u003cxclbin_file\u003e\n```\n\n**Sample Output (`cam_block`):**\n\n```bash\nMapping input buffer\nMapping output buffer\nCopying input data to device global memory\nLaunching RTL kernel\nCopying output data to device global memory\nComparing results\ni = 0 Software result = 1 Device result = 1\n...\nTEST PASSED\n```\n\n**Sample Output (`cam_unit`):**\n\n```bash\n...\nmatch results = 48\nTEST PASSED\n\nResult Analysis (48):\n---------------------\nBreakdown:\n- First 3 multi-query operations: 16 results each\n- Next 3 operations: 0 results each (CAM reset)\n- Total = (3 × 16) + (3 × 0) = 48\n```\n\n---\n## Triangle Counting on FPGA\n\nThis example utilizes a CAM-based edge-centric algorithm for efficient triangle counting in graphs.\n\n### Key Functionalities\n\n- **Adjacency List Extraction**: Retrieves adjacency lists of source and destination vertices per edge.\n- **Intersection Computation**: Uses CAM-based parallel search to compute intersections (triangle detection).\n\nSource files: `./TriangleCount`\n\n### Running the Triangle Counting Example\n\n0. **Dataset Preparation \u0026 Environment Setup**:\n\nYou can download the datasets used in our paper directly from this [Google Drive Link](https://drive.google.com/drive/folders/10qyk-ASlPxW-PwoP_6kM_AAGgDlgJRGb?usp=drive_link). If you would like to apply our accelerator to other graph datasets, please use the dataset preprocessing script:\n\n```bash\npython ./dataset/partition_tc.py\n```\nThis script converts the original CSR (Compressed Sparse Row) format into the following three files (edge_list.txt, csr_col.txt, csr_row_2.txt). To ensure compatibility with the CAM architecture, the script includes a **virtual node generation** method that prevents adjacency list lengths from exceeding the CAM size. More details can be found directly in the script.\n\nSet up the environment:\n```bash\nsource /opt/xilinx/xrt/setup.sh\nsource /YOUR_PATH/Vitis/2021.2/settings64.sh  # Update with your Vitis path\n```\n\n\n\n1. **Compile the Triangle Counting Application:**\n\n```bash\ncd ./TriangleCount\nmake all TARGET=hw_emu PLATFORM=\u003cplatform_path\u003e\n```\nWe also provide the compiled bitstream and host executable (for U250 FPGA, TARGET=hw) in this [Google Drive Link](https://drive.google.com/drive/folders/10qyk-ASlPxW-PwoP_6kM_AAGgDlgJRGb?usp=drive_link).\n\n2. **Run in Hardware Emulation Mode:**\n\n```bash\nXCL_EMULATION_MODE=hw_emu ./triangle_count -x ./triangle_count.xclbin\n```\n\n**Sample Output:**\n\n```bash\n...\nExecution completed successfully!\nTriangle count: 155\n```\n\n3. **Run in Hardware Mode (example for Xilinx U250):**\n\n```bash\nmake TARGET=hw PLATFORM=\u003cplatform_path\u003e\n\n./triangle_count -x ./build_dir.hw.\u003cplatform_name\u003e/triangle_count.xclbin -s ./dataset/as20000102\n```\n\n**Sample Hardware Output:**\n\n```bash\n...\nTriangleCount completed, execution time: 422 us\nExecution completed successfully!\nTriangle count: 6584\n```\n\n### Performance Results\n\n| Dataset             | Triangles    | CAM Solution (ms) | Baseline (ms) | Speedup |\n|---------------------|--------------|-------------------|---------------|---------|\n| facebook_combined   | 1,612,010    | 5.054             | 18.7          | 3.70x   |\n| amazon0302          | 717,719      | 23.086            | 89.5          | 3.88x   |\n| amazon0601          | 3,986,507    | 71.210            | 230.3         | 3.23x   |\n| as20000102          | 6,584        | 0.422             | 7.4           | 17.54x  |\n| cit-Patents         | 7,515,023    | 415.808           | 800           | 1.92x   |\n| ca-cit-HepPh        | 195,758,685  | 1,526.05          | 5,361.1       | 3.51x   |\n| roadNet-CA          | 120,676      | 62.058            | 108.8         | 1.75x   |\n| roadNet-PA          | 67,150       | 34.559            | 88.7          | 2.57x   |\n| roadNet-TX          | 82,869       | 42.323            | 96.8          | 2.29x   |\n| soc-Slashdot0811    | 551,724      | 29.402            | 259.7         | 8.83x   |\n\n- Baseline measurements from AMD Vitis official implementation.\n- Detailed results in `CAM/TriangleCount/results/`\n\n---\n\n## Contributing\n\nWe welcome contributions!\n\n- Fork this repository.\n- Implement features or optimizations.\n- Submit a pull request following the guidelines in [`CONTRIBUTING.md`](./CONTRIBUTING.md).\n\nThank you for contributing!\n\n## 📄 Citation\n\nIf you find this work useful in your research, please consider citing our paper:\n\n\u003e **Yao Chen, Feng Yu, Di Wu, Weng-Fai Wong, and Bingsheng He.**  \n\u003e *Configurable DSP-Based CAM Architecture for Data-Intensive Applications on FPGAs*.  \n\u003e In Proceedings of the 62nd Design Automation Conference (DAC), 2025.\n\n### BibTeX\n```bibtex\n@inproceedings{dsp_cam,\n  title={Configurable DSP-Based CAM Architecture for Data-Intensive Applications on FPGAs},\n  author={Yao Chen, Feng Yu, Di Wu, Weng-fai Wong and Bingsheng He},\n  booktitle={Proceedings of the 62nd Design Automation Conference (DAC)},\n  year={2025},\n  organization={ACM/IEEE}\n}\n```\n\n","funding_links":[],"categories":[],"sub_categories":[],"project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fxtra-computing%2Fdsp_cam","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fxtra-computing%2Fdsp_cam","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fxtra-computing%2Fdsp_cam/lists"}