{"id":24486059,"url":"https://github.com/zachmatson/slices_dispatch_wide","last_synced_at":"2025-03-14T22:12:17.896Z","repository":{"id":41539706,"uuid":"510081077","full_name":"zachmatson/slices_dispatch_wide","owner":"zachmatson","description":"A macro to dispatch vectorized math over slices using the `wide` crate for SIMD operations","archived":false,"fork":false,"pushed_at":"2022-07-03T17:41:03.000Z","size":10,"stargazers_count":0,"open_issues_count":0,"forks_count":0,"subscribers_count":1,"default_branch":"main","last_synced_at":"2025-02-28T07:03:53.711Z","etag":null,"topics":[],"latest_commit_sha":null,"homepage":null,"language":"Rust","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"apache-2.0","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/zachmatson.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":"CONTRIBUTING.md","funding":null,"license":"LICENSE-APACHE","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null}},"created_at":"2022-07-03T16:46:49.000Z","updated_at":"2023-09-26T03:39:28.000Z","dependencies_parsed_at":"2022-09-02T16:49:21.161Z","dependency_job_id":null,"html_url":"https://github.com/zachmatson/slices_dispatch_wide","commit_stats":null,"previous_names":[],"tags_count":0,"template":false,"template_full_name":null,"repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/zachmatson%2Fslices_dispatch_wide","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/zachmatson%2Fslices_dispatch_wide/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/zachmatson%2Fslices_dispatch_wide/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/zachmatson%2Fslices_dispatch_wide/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/zachmatson","download_url":"https://codeload.github.com/zachmatson/slices_dispatch_wide/tar.gz/refs/heads/main","host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":243652704,"owners_count":20325611,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":[],"created_at":"2025-01-21T14:32:08.837Z","updated_at":"2025-03-14T22:12:17.877Z","avatar_url":"https://github.com/zachmatson.png","language":"Rust","funding_links":[],"categories":[],"sub_categories":[],"readme":"# `slices_dispatch_wide!`\n\n[![Crates.io](https://img.shields.io/crates/v/slices_dispatch_wide)](https://crates.io/crates/slices_dispatch_wide)\n[![docs.rs](https://img.shields.io/docsrs/slices_dispatch_wide)](https://docs.rs/slices_dispatch_wide)\n[![Crates.io](https://img.shields.io/crates/l/slices_dispatch_wide)](https://crates.io/crates/slices_dispatch_wide)\n[![Crates.io](https://img.shields.io/crates/d/slices_dispatch_wide)](https://crates.io/crates/slices_dispatch_wide)\n\n---\n\nA macro to dispatch vectorized math over slices using the `wide` crate for SIMD operations\n\nThis crate iterates over chunks of your slice, converts them to types from the\n[wide](https://crates.io/crates/wide) crate, and dispatches some math over both those chunks\nand the remaining scalar elements. This crate will not work for you in every situation,\ndoes not do anything special for alignment, and probably won't beat the best possible hand-tuned\nSIMD code. That being said, if it works for your use case it will make your life easier.\n\nThis crate will be most useful if:\n- You need SIMD math operations (such as `sqrt`, `log`, `exp`, etc.) on *stable* Rust, today.\n- You don't want to bring in non-Rust libraries or complicate your build process to do that.\n- You need to iterate over multiple slices of the same length in lockstep, and modify\n  at least one of them.\n- You don't want to repeat yourself or write boilerplate.\n- You don't need variable lane width.\n\n## Examples\n\n```rust\nuse slices_dispatch_wide::*;\n\nlet mut a = [1.0_f64, 2.0, 3.0, 4.0, 5.0, 6.0];\nlet b = [2.0_f64, 2.0, 2.0, 2.0, 2.0, 2.0];\n\n// Dispatches using chunks/SIMD types of width 4\nslices_dispatch_wide!(4, |a =\u003e a mut: f64, b =\u003e b: f64| {\n    // We can mutate the slices when the mut keyword is specified as it is above\n    a += b;\n});\n// Notice that the number of elements is not a multiple of the SIMD width, the remainder is\n// taken care of with scalar operations\nassert_eq!(a, [3.0, 4.0, 5.0, 6.0, 7.0, 8.0]);\n\n// We can also do some fancier math operations in place\nslices_dispatch_wide!(2, |a =\u003e a mut: f64| {\n    a = a.powf(2.0);\n});\nassert_eq!(a, [9.0, 16.0, 25.0, 36.0, 49.0, 64.0]);\n\n// You can assign different names to the elements from the slices you use\n// And you can mutate multiple variables at the same time\nlet mut some_container = ([1.0, 2.0, 3.0, 4.0, 5.0, 6.0], \"test\", 0);\nlet mut c = [4.0, 2.0, 1.0, 0.0, 1.0, 2.0];\n\nslices_dispatch_wide!(4, |some_container.0 =\u003e sc mut: f64, c =\u003e d mut: f64| {\n    sc += d;\n    d += sc;\n});\nassert_eq!(some_container.0, [5.0, 4.0, 4.0, 4.0, 6.0, 8.0]);\nassert_eq!(c, [9.0, 6.0, 5.0, 4.0, 7.0, 10.0]);\n\n// If you need to get the result in a new array/vector, you can pre-allocate it\nlet mut d = [0.0; 6];\nslices_dispatch_wide!(4, |some_container.0 =\u003e sc: f64, d =\u003e d mut: f64| {\n    d = 2.0 * sc;\n});\nassert_eq!(d, [10.0, 8.0, 8.0, 8.0, 12.0, 16.0]);\n```\n\nNote that if the slice lengths don't match, this macro will panic\n```should_panic\n// This example will panic because the lengths are different\n\nuse slices_dispatch_wide::*;\n\nlet a = [0u32];\nlet b = [0u32, 1];\nslices_dispatch_wide!(8, |a =\u003e a: u32, b =\u003e b: u32| {});\n```\n\nAnd the width must be a literal\n```compile_fail\n// This example will not compile because the width is not a literal\n\nuse slices_dispatch_wide::*;\n\nlet a = [0u32];\nlet b = [0u32];\nslices_dispatch_wide!(4 + 4, |a =\u003e a: u32, b =\u003e b: u32| {});\n```\n\n### Caveats\n\n- The SIMD types used (the combination of lane width and scalar type for each slice used) must\n  exist in the [wide](https://crates.io/crates/wide) crate.\n- The code in the block must be valid when the iteration variables are the given scalar type\n  or the corresponding SIMD type.\n\n## License\n\nLicensed under any of\n\n* Apache License, Version 2.0, ([LICENSE-APACHE](LICENSE-APACHE) or https://www.apache.org/licenses/LICENSE-2.0)\n* MIT license ([LICENSE-MIT](LICENSE-MIT) or https://opensource.org/licenses/MIT)\n* Zlib license ([LICENSE-ZLIB](LICENSE-ZLIB) or https://opensource.org/licenses/Zlib)\n\nat your choice.\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fzachmatson%2Fslices_dispatch_wide","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fzachmatson%2Fslices_dispatch_wide","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fzachmatson%2Fslices_dispatch_wide/lists"}