{"id":19219968,"url":"https://github.com/zhutmost/intellij-systemverilog","last_synced_at":"2025-09-14T03:33:40.313Z","repository":{"id":239147868,"uuid":"798161954","full_name":"zhutmost/intellij-systemverilog","owner":"zhutmost","description":null,"archived":false,"fork":false,"pushed_at":"2024-05-12T19:45:57.000Z","size":423,"stargazers_count":8,"open_issues_count":0,"forks_count":0,"subscribers_count":2,"default_branch":"main","last_synced_at":"2025-06-09T20:06:45.910Z","etag":null,"topics":[],"latest_commit_sha":null,"homepage":null,"language":"Scala","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"mit","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/zhutmost.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":"LICENSE","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null}},"created_at":"2024-05-09T08:06:31.000Z","updated_at":"2025-04-14T01:57:26.000Z","dependencies_parsed_at":"2024-05-12T20:40:57.663Z","dependency_job_id":null,"html_url":"https://github.com/zhutmost/intellij-systemverilog","commit_stats":null,"previous_names":["zhutmost/intellij-systemverilog"],"tags_count":3,"template":false,"template_full_name":"JetBrains/sbt-idea-example","purl":"pkg:github/zhutmost/intellij-systemverilog","repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/zhutmost%2Fintellij-systemverilog","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/zhutmost%2Fintellij-systemverilog/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/zhutmost%2Fintellij-systemverilog/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/zhutmost%2Fintellij-systemverilog/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/zhutmost","download_url":"https://codeload.github.com/zhutmost/intellij-systemverilog/tar.gz/refs/heads/main","sbom_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/zhutmost%2Fintellij-systemverilog/sbom","scorecard":null,"host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":275058254,"owners_count":25398169,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","status":"online","status_checked_at":"2025-09-14T02:00:10.474Z","response_time":75,"last_error":null,"robots_txt_status":"success","robots_txt_updated_at":"2025-07-24T06:49:26.215Z","robots_txt_url":"https://github.com/robots.txt","online":true,"can_crawl_api":true,"host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":[],"created_at":"2024-11-09T14:33:27.944Z","updated_at":"2025-09-14T03:33:40.259Z","avatar_url":"https://github.com/zhutmost.png","language":"Scala","funding_links":[],"categories":[],"sub_categories":[],"readme":"\u003cdiv\u003e\n\u003cimg src=\"https://raw.githubusercontent.com/zhutmost/intellij-systemverilog/main/resources/META-INF/pluginIcon.svg\" alt=\"Logo\" align=\"left\" width=\"40\" height=\"40\"/\u003e\n\u003ch1 align=\"left\"\u003e SystemVerilog Language Server for Intellij IDEA \u003c/h1\u003e\n\u003c/div\u003e\n\n![Build](https://github.com/zhutmost/intellij-systemverilog/actions/workflows/build.yml/badge.svg)\n[![Version](https://img.shields.io/jetbrains/plugin/v/com.zhutmost.systemverilog.svg)](https://plugins.jetbrains.com/plugin/com.zhutmost.systemverilog)\n[![Downloads](https://img.shields.io/jetbrains/plugin/d/com.zhutmost.systemverilog.svg)](https://plugins.jetbrains.com/plugin/com.zhutmost.systemverilog)\n\u003c!-- Plugin description --\u003e\nThis plugin integrates SystemVerilog language servers (LSP) into Intellij IDEA, which enables on-the-fly syntax linting.\nIt supports multiple language servers, including:\n- [Verible](https://github.com/chipsalliance/verible) by ChipAlliance\n- [Svls](https://github.com/dalance/svls) by @dalance\n- Custom LSP (You can specify your own LSP binary)\n\n## 📦 Requirements\n\n#### 1. Install a SystemVerilog Language Server\n\nBefore starting, you need to install a LSP binary, and add it to your PATH environment variable.\nFor example, you can download Verible bianry `verible-verilog-ls` from [its GitHub Release](https://github.com/chipsalliance/verible/releases).\n\n#### 2. Intellij IDEA Ultimate\n\nOnly Intellij IDEA Ultimate supports LSP, so you cannot use this plugin with the Community version.\n\nCurrently, the language server protocol (LSP) support for Jetbrains IDEs is still in beta (View [JetBrains' Blog](https://blog.jetbrains.com/platform/2023/07/lsp-for-plugin-developers/) for more details).\n\n#### 3. Third-party SystemVerilog Plugin (Optional but Recommended)\n\nThis plugin does NOT include syntax highlighting. So you may need to install another SystemVerilog plugin\n`studio.edaphic.sv` from [Jetbrains Marketplace](https://plugins.jetbrains.com/plugin/10695-systemverilog).\n\nAlthough this plugin itself is free, the above third-party plugin and the Intellij IDEA Ultimate version are both paid, so you need to pay for them. You can [apply for free licenses](https://www.jetbrains.com/community/education/#students) for education or open-source proposes.\n\n## ⚙️ Configuration\n\nJust add the LSP binaries to your PATH environment variable.\nTo specify a LSP, You can set the plugin settings in:\n\n \u003ckbd\u003eSettings/Preferences\u003c/kbd\u003e \u003e \u003ckbd\u003eTools\u003c/kbd\u003e \u003e \u003ckbd\u003eSystemVerilog Plus\u003c/kbd\u003e.\n \n![Settings](https://raw.githubusercontent.com/zhutmost/intellij-systemverilog/main/img/settings.jpg)\n\n Then restart your Intellij IDEA, and see the LSP is activated:\n\n![LSP status](https://raw.githubusercontent.com/zhutmost/intellij-systemverilog/main/img/lsp-status.jpg)\n\nSome LSP may need extra configuration files, you can find them in their READMEs.\n\n### Verible\n\n#### Linting on the Fly\n![Verible linting demo](https://raw.githubusercontent.com/zhutmost/intellij-systemverilog/main/img/demo-linter-verible.jpg)\n\nTo custom your linting style, you can create a `.rules.verible_lint` file in your project root directory. You can find the linting rules in [Verible Linter Rule List](https://chipsalliance.github.io/verible/verilog_lint.html).\n\n#### Go to Definition\n\nNo configuration is needed. Just \"Ctrl/Cmd + Click\" on the identifier and the editor will jump to its declaration.\n\nFor more details of Verible, please visit:\n- [Verible Linter README](https://github.com/chipsalliance/verible/tree/master/verilog/tools/lint)\n- [Verible LSP README](https://github.com/chipsalliance/verible/tree/master/verilog/tools/ls)\n\n## ⚠️ Know Issues\n\nThe LSP support by JetBrains is still in beta, so the features of this plugin may not be stable.\nIf you have any problems, please feel free to open an issue on [GitHub](https://github.com/zhutmost/intellij-systemverilog/issues).\n\n\u003c!-- Plugin description end --\u003e\n\n### About the Third-party Plugin\n\nBesides, the mentioned SystemVerilog plugin (`studio.edaphic.sv` ) is no longer maintained, and it is not compatible with the latest version of Intellij IDEA.\nSo we provide a modified version of this plugin on [GitHub](https://github.com/zhutmost/intellij-systemverilog/releases/download/v0.0.1/studio.edaphic.sv.SystemVerilog.zip). You can choose to install this plugin manually:\n\n\u003ckbd\u003eSettings/Preferences\u003c/kbd\u003e \u003e \u003ckbd\u003ePlugins\u003c/kbd\u003e \u003e \u003ckbd\u003e⚙️\u003c/kbd\u003e \u003e \u003ckbd\u003eInstall plugin from disk...\u003c/kbd\u003e\n\nThey may obey their license (although it is not maintained), so you can choose to use it or not.\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fzhutmost%2Fintellij-systemverilog","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fzhutmost%2Fintellij-systemverilog","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fzhutmost%2Fintellij-systemverilog/lists"}