Ecosyste.ms: Awesome
An open API service indexing awesome lists of open source software.
"verilog" Awesome Lists
awesome-hdl
Hardware Description Languages
awesome awesome-list hacktoberfest hardware-description-language hdl verilog vhdl
870 stars
92 forks
121 projects
Last updated: 16 Apr 2024
awesome-open-hardware-verification
A List of Free and Open Source Hardware Verification Tools and Frameworks
awesome awesome-list constrained-random-verification coverage formal-verification hardware python verification verilog vhdl
448 stars
49 forks
44 projects
Last updated: 12 May 2024
ASIC-Design-Roadmap
The journey of designing an ASIC (application specific integrated circuit) is long and involves a number of major steps – moving from a concept to specification to tape-outs. Although the end product is typically quite small (measured in nanometers), this long journey is interesting and filled with many engineering challenges.
awesome awesome-list fpga hardware verilog
153 stars
21 forks
83 projects
Last updated: 29 May 2024
VHDL-Guide
VHDL Guide
awesome awesome-list awesome-resources fpga hardware hardware-description-language hardware-designs verilog vhdl vhdl-coursework
39 stars
4 forks
287 projects
Last updated: 23 May 2024
CPLD-Guide
Complex Programmable Logic Device (CPLD) Guide
awesome awesome-list awesome-resource awesome-resources circuits cpld fpga hardware hardware-designs integrated-circuits
29 stars
1 forks
287 projects
Last updated: 12 May 2024