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https://github.com/efabless/caravel
Caravel is a standard SoC harness with on chip resources to control and read/write operations from a user-dedicated space.
https://github.com/efabless/caravel
caravel magic openram openroad picorv32 sky130 vexriscv yosys
Last synced: 4 months ago
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Caravel is a standard SoC harness with on chip resources to control and read/write operations from a user-dedicated space.
- Host: GitHub
- URL: https://github.com/efabless/caravel
- Owner: efabless
- License: apache-2.0
- Created: 2021-10-07T18:32:22.000Z (over 2 years ago)
- Default Branch: main
- Last Pushed: 2024-03-13T18:54:34.000Z (4 months ago)
- Last Synced: 2024-03-14T16:06:56.517Z (4 months ago)
- Topics: caravel, magic, openram, openroad, picorv32, sky130, vexriscv, yosys
- Language: Verilog
- Homepage: https://caravel-harness.readthedocs.io/
- Size: 13.6 GB
- Stars: 234
- Watchers: 16
- Forks: 59
- Open Issues: 109
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Metadata Files:
- Readme: README.rst
- License: LICENSE
Lists
- awesome-sky130 - **Caravel** - Caravel repo (efabless:)
- awesome-stars - efabless/caravel - Caravel is a standard SoC harness with on chip resources to control and read/write operations from a user-dedicated space. (Verilog)