https://github.com/lowRISC/muntjac

64-bit multicore RISC-V processor
https://github.com/lowRISC/muntjac

Last synced: 3 months ago
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64-bit multicore RISC-V processor

• Host: GitHub
• URL: https://github.com/lowRISC/muntjac
• Owner: lowRISC
• License: apache-2.0
• Created: 2022-06-10T15:33:30.000Z (about 2 years ago)
• Default Branch: master
• Last Pushed: 2024-02-02T13:49:43.000Z (5 months ago)
• Last Synced: 2024-03-20T10:21:21.443Z (3 months ago)
• Language: SystemVerilog
• Size: 939 KB
• Stars: 52
• Watchers: 12
• Forks: 4
• Open Issues: 0
• Metadata Files:
  • Readme: README.md
  • Contributing: CONTRIBUTING.md
  • License: LICENSE

Lists

• awesome-opensource-hardware - muntjac
• awesome-opensource-hardware-repos - muntjac

README

        
![CI](https://github.com/lowRISC/muntjac/workflows/CI/badge.svg)

# Muntjac

Muntjac is a minimal 64-bit RISC-V multicore processor that's easy to understand, verify, and extend. The focus is on having a clean, well-tested design which others can build upon and further customise. Performance is secondary to correctness, but the aim is to work towards a design point (considering power, performance and area) that maximises the value of Muntjac as a baseline design for educational, academic, or real-world use.

Muntjac is currently a work in progress and is supported on a best-effort basis.

Documentation is available [here](doc/README.md) and build instructions are [here](./flows).

An example SoC and tutorial can be found [here](https://github.com/nbdd0121/muntjac-soc).

## How to contribute

Have a look at [CONTRIBUTING](./CONTRIBUTING.md) for guidelines on how to

contribute code to this repository.

## Licensing

Unless otherwise noted, everything in this repository is covered by the Apache

License, Version 2.0 (see [LICENSE](./LICENSE) for full text).