https://github.com/Arteris-IP/tlm2-interfaces

contains TLM2 based interfaces for AXI, ACE, CHI and other standard protocols
https://github.com/Arteris-IP/tlm2-interfaces

Last synced: 2 months ago
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contains TLM2 based interfaces for AXI, ACE, CHI and other standard protocols

• Host: GitHub
• URL: https://github.com/Arteris-IP/tlm2-interfaces
• Owner: Arteris-IP
• License: apache-2.0
• Created: 2020-02-26T18:37:18.000Z (almost 5 years ago)
• Default Branch: master
• Last Pushed: 2024-04-05T15:25:00.000Z (10 months ago)
• Last Synced: 2024-04-05T16:35:56.971Z (10 months ago)
• Language: C++
• Size: 2.98 MB
• Stars: 36
• Watchers: 5
• Forks: 9
• Open Issues: 3
• Metadata Files:
  • Readme: README.md
  • License: LICENSE

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README

        
# TLM2 interfaces

TLM2 based interface definitions compliant with the AXI, ACE and CHI protocols. The files allow development against a standard interface definition which will be compliant with other vendor-provided semiconductor IP models, for example, network-on-chip (NoC) interconnect models generated by Arteris IP products.

For installation, follow these steps:

    mkdir build 

    cmake -DCMAKE_PREFIX_PATH=$SYSTEMC_HOME ..  

    make install 

The library depends on IEEE 1666-2011 SystemC and is tested against SystemC version 2.3.3 with gcc-6.3. Other combinations will most likely also work. SystemC libraries are available for download at https://www.accellera.org/downloads/standards/systemc.