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https://github.com/SystemRDL/systemrdl-compiler

SystemRDL 2.0 language compiler front-end
https://github.com/SystemRDL/systemrdl-compiler

asic csr design-automation eda fpga hardware-description-language register-description-language register-descriptions registers systemrdl systemrdl-compiler

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SystemRDL 2.0 language compiler front-end

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# SystemRDL Compiler

The `systemrdl-compiler` project implements a generic compiler front-end for
Accellera's [SystemRDL 2.0](http://accellera.org/downloads/standards/systemrdl)
register description language. The goal of this project is to provide a free and
open compiler that lowers the barrier to entry to using an industry standard
register description language.

By providing an elaborated register model that is easy to traverse and query,
it should be far easier to write custom register space view generators.

![overview](docs/img/overview.svg)

## Documentation
See the [SystemRDL Compiler Documentation](http://systemrdl-compiler.readthedocs.io) for more details

## Related Projects

If you are looking for a complete SystemRDL command line tool, see the [PeakRDL project](https://peakrdl.readthedocs.io).

## License

The SystemRDL Compiler is published and distributed under the [MIT License](LICENSE).