https://github.com/ZsoltKRSY/Image-display-from-FPGA-with-VGA
A project focusing on displaying an image (or more images) on external devices from an FPGA with the help of the VGA output.
https://github.com/ZsoltKRSY/Image-display-from-FPGA-with-VGA
fpga matlab vga vhdl
Last synced: about 2 months ago
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A project focusing on displaying an image (or more images) on external devices from an FPGA with the help of the VGA output.
- Host: GitHub
- URL: https://github.com/ZsoltKRSY/Image-display-from-FPGA-with-VGA
- Owner: korZsolt
- Created: 2024-10-18T20:44:32.000Z (12 months ago)
- Default Branch: main
- Last Pushed: 2024-10-27T18:15:36.000Z (12 months ago)
- Last Synced: 2024-10-27T21:47:23.783Z (11 months ago)
- Topics: fpga, matlab, vga, vhdl
- Language: VHDL
- Homepage:
- Size: 336 KB
- Stars: 0
- Watchers: 1
- Forks: 0
- Open Issues: 0
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Metadata Files:
- Readme: README.md
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README
# Image-display-from-FPGA-with-VGA
## Description
The focus of this project is *displaying images stored on an FPGA on a monitor, with the help of the board's VGA output*.\
The project is implemented in **Xilinx Vivado 2018.3**, written in VHDL. Other operations, like transforming an image into a binary text file, were done in **MatLab**.\
The project was made with the **Nexys4** FPGA in mind, and was also tested on this board and a **1280*1024 resolution**, **60Hz refresh rate** monitor. Depending on the specifications of your devices, some parameters might need to be modified for the code to work, but *potential changes are commented in the VHDL and MatLab files*.
### Components
Aside the module that displays the pixels and the main module, the project contains an **MPG**, **clock divider** and **RAM memory**.