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https://github.com/a-r-r-o-w/digital-design-lab-ue20cs206
Implementation of digital circuits taught as part of my undergraduate course in Digital Design and Computer Organization
https://github.com/a-r-r-o-w/digital-design-lab-ue20cs206
Last synced: about 1 month ago
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Implementation of digital circuits taught as part of my undergraduate course in Digital Design and Computer Organization
- Host: GitHub
- URL: https://github.com/a-r-r-o-w/digital-design-lab-ue20cs206
- Owner: a-r-r-o-w
- License: mit
- Created: 2021-09-10T18:43:08.000Z (over 3 years ago)
- Default Branch: main
- Last Pushed: 2021-11-17T23:16:29.000Z (about 3 years ago)
- Last Synced: 2024-12-05T17:40:38.821Z (about 1 month ago)
- Language: Verilog
- Homepage:
- Size: 5.5 MB
- Stars: 1
- Watchers: 1
- Forks: 0
- Open Issues: 0
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Metadata Files:
- Readme: README.md
- License: LICENSE
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README
# Digital-Design
Implementation of Digital Circuits taught as part of undergraduate course in Digital Design and Computer Organization in Verilog