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https://github.com/aanujkhurana/circuit-board-game
Logic Circuit Exercise, created using logisim
https://github.com/aanujkhurana/circuit-board-game
logic-circuit logic-circuit-design logisim
Last synced: about 2 months ago
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Logic Circuit Exercise, created using logisim
- Host: GitHub
- URL: https://github.com/aanujkhurana/circuit-board-game
- Owner: aanujkhurana
- Created: 2024-03-09T03:46:51.000Z (10 months ago)
- Default Branch: main
- Last Pushed: 2024-03-09T04:16:04.000Z (10 months ago)
- Last Synced: 2024-03-10T04:32:11.631Z (10 months ago)
- Topics: logic-circuit, logic-circuit-design, logisim
- Homepage:
- Size: 3 MB
- Stars: 0
- Watchers: 1
- Forks: 0
- Open Issues: 0
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Metadata Files:
- Readme: README.md
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README
# Logic Circuit Simulation
This repository contains a logic circuit simulation implemented using Logisim, a digital logic circuit simulator. The simulation aims to replicate a simple game scenario and consists of two main parts A and B:
## Overview
The final circuit consists of two subcircuits: one for Part A, labeled as "logic P=Q," and one for Part B, labeled as "counter."
Part A of the circuit is responsible for performing logical operations between two variables, P and Q, which can range from 0 to 7. Various operations such as addition, subtraction, and comparison are implemented. The logic is based on the relationships P = Q+1, P = Q-1, P = Q+2, and P = Q-2. By combining inputs of Q using OR gates and combining Q inputs with P inputs ranging from 0-7 using AND gates, successful combinations yield an output of 1.Part B of the circuit utilizes a counter to count successful and unsuccessful combinations produced by Part A. A button input is used to count items, maintaining connectivity to the main circuit. A NOT gate is employed for counting purposes. Additionally, a comparator with a constant value of 3 resets the counter after three unsuccessful combinations, while another comparator with a constant value of 6, followed by a D flip-flop, controls the simulation by stopping it after six successful combinations.
## Implementation Details
- A 3-to-8 bit decoder is used to decode the values of P and Q, as they can range from 0-7.
- OR gates are used to combine inputs of Q, while AND gates are used to combine Q inputs with P inputs ranging from 0-7.
- A NOT gate is utilized for counting successful and unsuccessful combinations.
- Comparators with constant values of 3 and 6, along with a D flip-flop, are used for controlling the simulation.
## Part A: Logic Operations (P=Q)
In this part, the circuit performs various logical operations between two variables, P and Q, which can range from 0 to 7. The operations include addition, subtraction, and comparison. Different combinations of P and Q are analyzed, and corresponding output signals are generated.
## Part B: Counter and Simulation Control
Part B of the circuit involves counting successful and unsuccessful combinations generated by Part A. It utilizes a counter, a button for input, and comparators to determine when to reset the counter or stop the simulation based on predefined criteria.
## Usage
To run the simulation:
1. Download and install Logisim from [here](http://www.cburch.com/logisim/download.html).
2. Open Logisim and load the provided circuit file.
3. Run the simulation to observe the behavior of the logic circuit.Feel free to contribute by suggesting improvements or adding new features to the logic circuit simulation.
## Acknowledgments
Thank you for your interest in this logic circuit simulation!
## License
This project is licensed under the MIT License - see the [LICENSE](LICENSE) file for details.